From patchwork Tue Sep 1 16:24:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 11749073 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E5D0D109A for ; Tue, 1 Sep 2020 16:26:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CD3DF20BED for ; Tue, 1 Sep 2020 16:26:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="gPX0CY04" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732079AbgIAQ0P (ORCPT ); Tue, 1 Sep 2020 12:26:15 -0400 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:12014 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731094AbgIAQZU (ORCPT ); Tue, 1 Sep 2020 12:25:20 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 01 Sep 2020 09:24:34 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 01 Sep 2020 09:25:20 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 01 Sep 2020 09:25:20 -0700 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 1 Sep 2020 16:25:16 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 1 Sep 2020 16:25:16 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.173.243]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 01 Sep 2020 09:25:16 -0700 From: Sowjanya Komatineni To: , , , , CC: , , , , , Subject: [PATCH v2 4.19 2/7] sdhci: tegra: Remove SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK for Tegra186 Date: Tue, 1 Sep 2020 09:24:45 -0700 Message-ID: <1598977490-1826-3-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1598977490-1826-1-git-send-email-skomatineni@nvidia.com> References: <1598977490-1826-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1598977474; bh=P0TrqOSX/pFm1lSj+n+CWI62xwQfg7mnTl7pkIHmHwM=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=gPX0CY04TYC5dcz7cP4dcDZIW2ljFO6twxuS8UP8g10rzBsBzD8eovrpzNh1gIebt PPalEP7WIgAC4L1oRdiYsi8Kao48Bj51FxmRGqAWtjeHK6GcG03iSUZdqMOnTTsOJk Twl9B9ZenLhCNWrai67DxKHd2WUCRQS/HxUlQ+t/AHwMAg6pF71N9RrhyFRKD4i1bn 1rpKKnOcdT0sqEzthEjbSVTio1xnbdva8h9qYVTxOx9K6X94pEPOSfmr1r1Edyc43X XKuf6vSFqW0YA9oyLTbpJkSK66dh79m438BHFNybX0orrISn55HUCzYK/Uu1jru0sQ EET64Okvty7Hw== Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK has been set on Tegra186 ever since Tegra186 support was added to the driver in commit 4346b7c7941d ("mmc: tegra: Add Tegra186 support"). Tegra186 SDMMC hardware by default uses timeout clock (TMCLK) instead of SDCLK and this quirk should not be set. So, this patch remove this quirk for Tegra186. Fixes: 4346b7c7941d ("mmc: tegra: Add Tegra186 support") Cc: stable # 4.19 Tested-by: Jon Hunter Reviewed-by: Jon Hunter Acked-by: Adrian Hunter Signed-off-by: Sowjanya Komatineni --- drivers/mmc/host/sdhci-tegra.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 731956e..5a7c032 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -437,7 +437,6 @@ static const struct sdhci_tegra_soc_data soc_data_tegra210 = { static const struct sdhci_pltfm_data sdhci_tegra186_pdata = { .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | - SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | SDHCI_QUIRK_SINGLE_POWER_WRITE | SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |