From patchwork Wed Dec 1 12:49:00 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chuanxiao.Dong" X-Patchwork-Id: 371031 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oB1CqDdx009872 for ; Wed, 1 Dec 2010 12:52:13 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754946Ab0LAMwH (ORCPT ); Wed, 1 Dec 2010 07:52:07 -0500 Received: from mga09.intel.com ([134.134.136.24]:64191 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754934Ab0LAMwG convert rfc822-to-8bit (ORCPT ); Wed, 1 Dec 2010 07:52:06 -0500 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 01 Dec 2010 04:52:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.59,283,1288594800"; d="scan'208,223";a="682751070" Received: from unknown (HELO intel.com) ([172.16.120.128]) by orsmga001.jf.intel.com with ESMTP; 01 Dec 2010 04:52:03 -0800 Date: Wed, 1 Dec 2010 20:49:00 +0800 From: Chuanxiao Dong To: linux-mmc@vger.kernel.org Cc: linux-kernel@vger.kernel.org, cjb@laptop.org, arjan@linux.intel.com, alan@linux.intel.com, akpm@linux-foundation.org Subject: [PATCH v4 1/4]enable HW reset capbility Message-ID: <20101201124900.GB5421@intel.com> Reply-To: Chuanxiao Dong MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.19 (2009-01-05) Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 01 Dec 2010 12:52:13 +0000 (UTC) diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 77f93c3..85cc7f6 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -310,6 +310,10 @@ static int mmc_read_ext_csd(struct mmc_card *card) ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT]; card->ext_csd.trim_timeout = 300 * ext_csd[EXT_CSD_TRIM_MULT]; + /* + * check Hardware reset cap + */ + card->ext_csd.rst = ext_csd[EXT_CSD_RST]; } if (ext_csd[EXT_CSD_ERASED_MEM_CONT]) @@ -484,6 +488,31 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, } /* + * eMMC4.4 version card has HW reset capbility. + * Enable this feature here: + * RST_N_FUNCTION register is W/R, one time programmable + * or readable. + * So need to enable this register only once after power on + */ + if (card->csd.mmca_vsn >= CSD_SPEC_VER_4 && + card->ext_csd.rev >= 4 && + card->ext_csd.rst == 0) { + err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_RST, 1); + + if (err && err != -EBADMSG) + goto free_card; + + if (err) { + printk(KERN_WARNING "%s: switch to rst enable " + "failed %d\n", + mmc_hostname(card->host), err); + err = 0; + } else + card->ext_csd.rst = 1; + } + + /* * Activate high speed (if supported) */ if ((card->ext_csd.hs_max_dtr != 0) && diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index 8ce0827..ebee676 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -54,6 +54,7 @@ struct mmc_ext_csd { unsigned int sec_trim_mult; /* Secure trim multiplier */ unsigned int sec_erase_mult; /* Secure erase multiplier */ unsigned int trim_timeout; /* In milliseconds */ + unsigned int rst; /* hardware reset enable bit */ }; struct sd_scr { diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index 956fbd8..b7ab0da 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h @@ -251,6 +251,7 @@ struct _mmc_csd { * EXT_CSD fields */ +#define EXT_CSD_RST 162 /* onetime programmable R/W */ #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ #define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */