@@ -310,6 +310,10 @@ static int mmc_read_ext_csd(struct mmc_card *card)
ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT];
card->ext_csd.trim_timeout = 300 *
ext_csd[EXT_CSD_TRIM_MULT];
+ /*
+ * check Hardware reset cap
+ */
+ card->ext_csd.rst = ext_csd[EXT_CSD_RST];
}
if (ext_csd[EXT_CSD_ERASED_MEM_CONT])
@@ -484,6 +488,31 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
}
/*
+ * eMMC4.4 version card has HW reset capability.
+ * Enable this feature here:
+ * RST_N_FUNCTION register is W/R, one time programmable
+ * or readable.
+ * So need to enable this register only once after power on
+ */
+ if (card->csd.mmca_vsn >= CSD_SPEC_VER_4 &&
+ card->ext_csd.rev >= 5 &&
+ card->ext_csd.rst == 0) {
+ err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_RST, 1);
+
+ if (err && err != -EBADMSG)
+ goto free_card;
+
+ if (err) {
+ printk(KERN_WARNING "%s: switch to rst enable "
+ "failed %d\n",
+ mmc_hostname(card->host), err);
+ err = 0;
+ } else
+ card->ext_csd.rst = 1;
+ }
+
+ /*
* Activate high speed (if supported)
*/
if ((card->ext_csd.hs_max_dtr != 0) &&
@@ -54,6 +54,7 @@ struct mmc_ext_csd {
unsigned int sec_trim_mult; /* Secure trim multiplier */
unsigned int sec_erase_mult; /* Secure erase multiplier */
unsigned int trim_timeout; /* In milliseconds */
+ unsigned int rst; /* hardware reset enable bit */
};
struct sd_scr {
@@ -251,6 +251,7 @@ struct _mmc_csd {
* EXT_CSD fields
*/
+#define EXT_CSD_RST 162 /* onetime programmable R/W */
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */