From patchwork Fri Aug 15 03:28:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chuanxiao.Dong" X-Patchwork-Id: 4726161 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 01CC7C0338 for ; Fri, 15 Aug 2014 03:29:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 22EA2201C8 for ; Fri, 15 Aug 2014 03:29:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 30AD0201BF for ; Fri, 15 Aug 2014 03:29:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932180AbaHOD3I (ORCPT ); Thu, 14 Aug 2014 23:29:08 -0400 Received: from mga02.intel.com ([134.134.136.20]:5458 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932122AbaHOD3I (ORCPT ); Thu, 14 Aug 2014 23:29:08 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 14 Aug 2014 20:29:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,867,1400050800"; d="scan'208";a="588416856" Received: from cxdong-dev.bj.intel.com (HELO intel.com) ([172.16.118.168]) by orsmga002.jf.intel.com with ESMTP; 14 Aug 2014 20:28:28 -0700 Date: Fri, 15 Aug 2014 11:28:07 +0800 From: Chuanxiao Dong To: linux-mmc@vger.kernel.org, ulf.hansson@linaro.org, chris@printf.org Subject: [PATCH v3] mmc: core: try 1.8v signling in ddr mode if host and device Message-ID: <20140815032806.GA19745@intel.com> Reply-To: Chuanxiao Dong MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Even (e)MMC card can support 3.3v to 1.2v vccq in DDR, but not all host controller can support this, like some of the SDHCI host which connect to an eMMC device. Some of these host controller still needs to use 1.8v vccq for supporting DDR mode. So the sequence will be: if (host and device can both support 1.2v IO) use 1.2v IO; else if (host and device can both support 1.8v IO) use 1.8v IO; so if host and device can only support 3.3v IO, this is the last choice. Signed-off-by: Chuanxiao Dong Signed-off-by: Yunpeng Gao --- Changelog V2: - For (e)MMC device switching to DDR mode, try 1.2v singaling first. Then try 1.8v. If 1.2v and 1.8v are both not supported, use the default Changelog V3: - continue to try 1.8v/3.3v vccq if there is IO voltage switching failure drivers/mmc/core/mmc.c | 34 +++++++++++++++++++++++++--------- 1 file changed, 25 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 793c6f7..8d69671 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -988,19 +988,35 @@ static int mmc_select_hs_ddr(struct mmc_card *card) * 1.8V vccq at 3.3V core voltage (vcc) is not required * in the JEDEC spec for DDR. * - * Do not force change in vccq since we are obviously - * working and no change to vccq is needed. + * Even (e)MMC card can support 3.3v to 1.2v vccq, but not all + * host controller can support this, like some of the SDHCI + * controller which connect to an eMMC device. Some of these + * host controller still needs to use 1.8v vccq for supporting + * DDR mode. + * + * So the sequence will be: + * if (host and device can both support 1.2v IO) + * use 1.2v IO; + * else if (host and device can both support 1.8v IO) + * use 1.8v IO; + * so if host and device can only support 3.3v IO, this is the + * last choice. * * WARNING: eMMC rules are NOT the same as SD DDR */ - if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_2V) { - err = __mmc_set_signal_voltage(host, - MMC_SIGNAL_VOLTAGE_120); - if (err) - return err; - } + err = -EINVAL; + if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_2V) + err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); - mmc_set_timing(host, MMC_TIMING_MMC_DDR52); + if (err && (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_8V)) + err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); + + /* make sure vccq is 3.3v after switching disaster */ + if (err) + err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330); + + if (!err) + mmc_set_timing(host, MMC_TIMING_MMC_DDR52); return err; }