From patchwork Wed Apr 6 00:56:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8756971 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BB77F9F336 for ; Wed, 6 Apr 2016 00:56:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EF918200F3 for ; Wed, 6 Apr 2016 00:56:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 02CB82034B for ; Wed, 6 Apr 2016 00:56:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759357AbcDFA4b (ORCPT ); Tue, 5 Apr 2016 20:56:31 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:55104 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754114AbcDFA4a (ORCPT ); Tue, 5 Apr 2016 20:56:30 -0400 Received: from reginn.isobedori.kobe.vergenet.net (p6216-ipbfp1501kobeminato.hyogo.ocn.ne.jp [114.153.217.216]) by kirsty.vergenet.net (Postfix) with ESMTPA id 7CBA025B7A9; Wed, 6 Apr 2016 10:56:17 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1459904177; bh=pAGkX/NlnSAUki09DIG4Sm8E7ofdDNrmwsRKW1z0ip4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=dp2EQmmQbvDvl8vIZ0Pgjt16NnPqB4XCrfrBWhUIVSsKzCoNP0Kj1vWfJl28qtuu4 ZbzAkL8FH9ts/eiGHMcuSWfY5uDEeWLkPhMvmtWNLxhQPu9hG1N+uE0/aIrW0XWWht 5y1EdOgn7m461X4nZywEUF2AH0kFjt/SqvX1KFTQ= Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 3B24D94048C; Wed, 6 Apr 2016 09:56:16 +0900 (JST) Date: Wed, 6 Apr 2016 09:56:16 +0900 From: Simon Horman To: Wolfram Sang Cc: linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Ben Hutchings Subject: Re: [v2,9/9] ARM: shmobile: r8a7790: lager: Enable UHS-I SDR-50 Message-ID: <20160406005616.GA7135@verge.net.au> References: <1459525479-20842-10-git-send-email-wsa@the-dreams.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1459525479-20842-10-git-send-email-wsa@the-dreams.de> Organisation: Horms Solutions Ltd. User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Apr 01, 2016 at 05:44:39PM +0200, Wolfram Sang wrote: > From: Wolfram Sang > > Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}. For some reason which I am entirely unsure of git didn't apply this cleanly so I did so manually. Please double check that the following is correct. From: Wolfram Sang Subject: [PATCH] ARM: shmobile: r8a7790: lager: Enable UHS-I SDR-50 Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}. Signed-off-by: Ben Hutchings Signed-off-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index aa6ca92a9485..75fc8d1cb7e3 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -346,11 +346,25 @@ sdhi0_pins: sd0 { renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; renesas,function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi2_pins: sd2 { renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; renesas,function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; }; mmc1_pins: mmc1 { @@ -539,21 +553,25 @@ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; }; &sdhi2 { pinctrl-0 = <&sdhi2_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi2>; vqmmc-supply = <&vccq_sdhi2>; cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; };