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Tue, 24 Jan 2017 18:27:32 +0900 (KST) Received: from epcpsbgm2new.samsung.com (u27.gpu120.samsung.co.kr [203.254.230.27]) by epcas5p3.samsung.com (KnoxPortal) with ESMTP id 20170124092731epcas5p342bb2305df7da4d9cac5a182ece34449~cqw2WSXGI1217412174epcas5p3u; Tue, 24 Jan 2017 09:27:31 +0000 (GMT) X-AuditID: b6c32a59-f79be6d0000012bb-32-58871e0484ab Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id 7B.89.06428.30E17885; Tue, 24 Jan 2017 18:27:31 +0900 (KST) Received: from localhost.localdomain ([10.113.62.216]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OKA009FI29VLAA0@mmp1.samsung.com>; Tue, 24 Jan 2017 18:27:31 +0900 (KST) From: Jaehoon Chung To: linux-mmc@vger.kernel.org Cc: ulf.hansson@linaro.org, Jaehoon Chung Subject: [PATCH 2/2] mmc: sdhci-s3c: use the bitops API for bit operation Date: Tue, 24 Jan 2017 18:27:28 +0900 Message-id: <20170124092728.19874-3-jh80.chung@samsung.com> X-Mailer: git-send-email 2.10.2 In-reply-to: <20170124092728.19874-1-jh80.chung@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrIKsWRmVeSWpSXmKPExsWy7bCmli6LXHuEwf3PbBY3frWxWhz5389o cXxtuAOzx51re9g8+rasYvT4vEkugDkq1SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ 0sJcSSEvMTfVVsnFJ0DXLTMHaI+SQlliTilQKCCxuFhJ386mKL+0JFUhI7+4xFYp2tDQSM/Q wFzPyMhIz8Q41srIFKgkITXj9bmp7AWHxCvuf3rM0sDYItLFyMkhIWAisbD7JjOELSZx4d56 ti5GLg4hgaWMEveubmWBcNqZJJ5cXscC0/FzxXxmiMRyRonHUyZDVf1glNhyZgs7SBWbgI7E 9m/HmUBsEQFZiZ9/LrCB2MwCThJX73WC1QgLeEoc+3+fEcRmEVCVmLFsEVicV8Ba4k33RkaI bfISC88fAZrDwcEpYCPxclMayC4JgSNsEgevzmYHiUsAzd90AOoFF4mlLxYwQdjCEq+OQ5wj ISAt8XfpLUaI3m5GiX9fNrJBOD2MEre2robqMJa4/+AeM8ShfBK9v58wQSzglehoE4IwPSQe X5aAqHaU+DN1BTvE7/2MErP3rmGewCizgJFhFaNYakFxbnpqsWmBqV5xYm5xaV66XnJ+7iZG cPLQitzBeGVm0CFGAQ5GJR7eAqm2CCHWxLLiytxDjBIczEoivF/E2yOEeFMSK6tSi/Lji0pz UosPMZoCg2kis5Rocj4wseWVxBuamBmaGFkCobmhuZI474IK6wghgfTEktTs1NSC1CKYPiYO TqkGxonyM3Ofcf43KFj5YlLo1Wy7NYz/G2bn7Ob196+qXP/U/Ly/wVYn2z1fDa9y86rG5D9f 0GFXeUevI37SEp6bxtV32ngdmGZdOtrC5TVBaPeHonp+5ZRviU+61ssHHWjuNzn1T+hR984D hyPfCnNtnHeZ5ceZ7JmHLf4rq7HunZ3YXfaXQ921VImlOCPRUIu5qDgRAE8yuis0AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrDLMWRmVeSWpSXmKPExsVy+t9jAV1mufYIgz97LC1u/GpjtTjyv5/R 4vjacAdmjzvX9rB59G1ZxejxeZNcAHOUm01GamJKapFCal5yfkpmXrqtUmiIm66FkkJeYm6q rVKErm9IkJJCWWJOKZBnZIAGHJwD3IOV9O0S3DJen5vKXnBIvOL+p8csDYwtIl2MnBwSAiYS P1fMZ4awxSQu3FvPBmILCSxllPhzi6mLkQvI/sEoceHlPCaQBJuAjsT2b8fBbBEBWYmffy6A NTALOElcvdfJDmILC3hKHPt/nxHEZhFQlZixbBFYnFfAWuJN90ZGiGXyEgvPHwGaw8HBKWAj 8XJTGsRea4lTL58wT2DkXcDIsIpRIrUguaA4KT3XKC+1XK84Mbe4NC9dLzk/dxMjOCSfSe9g PLzL/RCjAAejEg/vCZm2CCHWxLLiytxDjBIczEoivF/E2yOEeFMSK6tSi/Lji0pzUosPMZoC 3TWRWUo0OR8YL3kl8YYm5ibmxgYW5paWJkZK4ryNs5+FCwmkJ5akZqemFqQWwfQxcXBKNTDa 7NzrL5naazSt+I668T8Fg/3/ju45lHvJlM1kyelKzauMd7dsPL9PjO3B2tnby18WbJn8xLHQ o7JkwZm5+Wxyn5+FXlfx2N7y5w/j26nOSuJiZ8WLZtoxNtfH1bo7rWwtqVF9kP71kk35vWvy j1tjo5b/dO9+kDzX5+SUjpKgzKKGlXpLQt8psRRnJBpqMRcVJwIA0oF4Tl8CAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170124092731epcas5p342bb2305df7da4d9cac5a182ece34449 X-Msg-Generator: CA X-Sender-IP: 203.254.230.27 X-Local-Sender: =?UTF-8?B?7KCV7J6s7ZuIG1RpemVuIFBsYXRmb3JtIExhYihTL1fshLw=?= =?UTF-8?B?7YSwKRvsgrzshLHsoITsnpAbUzUo7LGF7J6EKS/ssYXsnoQ=?= X-Global-Sender: =?UTF-8?B?SmFlaG9vbiBDaHVuZxtUaXplbiBQbGF0Zm9ybSBMYWIuG1Nh?= =?UTF-8?B?bXN1bmcgRWxlY3Ryb25pY3MbUzUvU2VuaW9yIEVuZ2luZWVy?= X-Sender-Code: =?UTF-8?B?QzEwG1NUQUYbQzEwVjgxMTE=?= CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-HopCount: 7 X-CMS-RootMailID: 20170124092731epcas5p342bb2305df7da4d9cac5a182ece34449 X-RootMTR: 20170124092731epcas5p342bb2305df7da4d9cac5a182ece34449 References: <20170124092728.19874-1-jh80.chung@samsung.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use the bitops API instead of shifting directly. Signed-off-by: Jaehoon Chung --- Changelog on V2: - Keep the unused defined mask drivers/mmc/host/sdhci-s3c.c | 41 +++++++++++++++++++++-------------------- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 7a230a1..3e5c83d 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -37,10 +37,10 @@ #define S3C_SDHCI_CONTROL3 (0x84) #define S3C64XX_SDHCI_CONTROL4 (0x8C) -#define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31) -#define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK (1 << 30) -#define S3C_SDHCI_CTRL2_CDINVRXD3 (1 << 29) -#define S3C_SDHCI_CTRL2_SLCARDOUT (1 << 28) +#define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR BIT(31) +#define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK BIT(30) +#define S3C_SDHCI_CTRL2_CDINVRXD3 BIT(29) +#define S3C_SDHCI_CTRL2_SLCARDOUT BIT(28) #define S3C_SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24) #define S3C_SDHCI_CTRL2_FLTCLKSEL_SHIFT (24) @@ -50,11 +50,11 @@ #define S3C_SDHCI_CTRL2_LVLDAT_SHIFT (16) #define S3C_SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16) -#define S3C_SDHCI_CTRL2_ENFBCLKTX (1 << 15) -#define S3C_SDHCI_CTRL2_ENFBCLKRX (1 << 14) -#define S3C_SDHCI_CTRL2_SDCDSEL (1 << 13) -#define S3C_SDHCI_CTRL2_SDSIGPC (1 << 12) -#define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11) +#define S3C_SDHCI_CTRL2_ENFBCLKTX BIT(15) +#define S3C_SDHCI_CTRL2_ENFBCLKRX BIT(14) +#define S3C_SDHCI_CTRL2_SDCDSEL BIT(13) +#define S3C_SDHCI_CTRL2_SDSIGPC BIT(12) +#define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART BIT(11) #define S3C_SDHCI_CTRL2_DFCNT_MASK (0x3 << 9) #define S3C_SDHCI_CTRL2_DFCNT_SHIFT (9) @@ -63,19 +63,20 @@ #define S3C_SDHCI_CTRL2_DFCNT_16SDCLK (0x2 << 9) #define S3C_SDHCI_CTRL2_DFCNT_64SDCLK (0x3 << 9) -#define S3C_SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8) -#define S3C_SDHCI_CTRL2_RWAITMODE (1 << 7) -#define S3C_SDHCI_CTRL2_DISBUFRD (1 << 6) +#define S3C_SDHCI_CTRL2_ENCLKOUTHOLD BIT(8) +#define S3C_SDHCI_CTRL2_RWAITMODE BIT(7) +#define S3C_SDHCI_CTRL2_DISBUFRD BIT(6) + #define S3C_SDHCI_CTRL2_SELBASECLK_MASK (0x3 << 4) #define S3C_SDHCI_CTRL2_SELBASECLK_SHIFT (4) -#define S3C_SDHCI_CTRL2_PWRSYNC (1 << 3) -#define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1) -#define S3C_SDHCI_CTRL2_HWINITFIN (1 << 0) - -#define S3C_SDHCI_CTRL3_FCSEL3 (1 << 31) -#define S3C_SDHCI_CTRL3_FCSEL2 (1 << 23) -#define S3C_SDHCI_CTRL3_FCSEL1 (1 << 15) -#define S3C_SDHCI_CTRL3_FCSEL0 (1 << 7) +#define S3C_SDHCI_CTRL2_PWRSYNC BIT(3) +#define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON BIT(1) +#define S3C_SDHCI_CTRL2_HWINITFIN BIT(0) + +#define S3C_SDHCI_CTRL3_FCSEL3 BIT(31) +#define S3C_SDHCI_CTRL3_FCSEL2 BIT(23) +#define S3C_SDHCI_CTRL3_FCSEL1 BIT(15) +#define S3C_SDHCI_CTRL3_FCSEL0 BIT(7) #define S3C_SDHCI_CTRL3_FIA3_MASK (0x7f << 24) #define S3C_SDHCI_CTRL3_FIA3_SHIFT (24)