From patchwork Fri May 19 08:15:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 9736223 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 72483601C2 for ; Fri, 19 May 2017 08:19:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 448FF288AD for ; Fri, 19 May 2017 08:19:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 390C3288E5; Fri, 19 May 2017 08:19:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6FCBC288AD for ; Fri, 19 May 2017 08:19:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755256AbdESITR (ORCPT ); Fri, 19 May 2017 04:19:17 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:46470 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753221AbdESITK (ORCPT ); Fri, 19 May 2017 04:19:10 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v4J8IOE6006246; Fri, 19 May 2017 03:18:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1495181904; bh=WHguFNAYODUHgJ8ratqwyQCXZD9KDgJzL4uXgTTi1wI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rRorBiU/DT2/74uXmXW8qWBRkEnyrvaqUXlZ/AjBRIjKfaVbFY2TWldS5lL2eFhzm X/uELyYUTkD5M22TCVmSE1SFTauPGmriewrLLYRKgtmIZr/ETNBaCZ81xTTe2sqvIV zpkeF5JxfNcH0clFyQ5plhzE4tzRuPyGXQjlT8h4= Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4J8IOqg030014; Fri, 19 May 2017 03:18:24 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Fri, 19 May 2017 03:18:23 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4J8FfQg009185; Fri, 19 May 2017 03:18:19 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren CC: , , , , , , Jonathan Corbet , Mark Rutland , Russell King , , Subject: [PATCH 35/41] ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes Date: Fri, 19 May 2017 13:45:35 +0530 Message-ID: <20170519081541.26753-36-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170519081541.26753-1-kishon@ti.com> References: <20170519081541.26753-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On DRA7 family SoCs, MMC1 controller supports SDR104, SDR50, DDR50, SDR25 and SDR12 UHS modes (These UHS modes are not supported in beagle-x15 because it's not possible to switch IO lines supply voltage to 1.8v). MMC2 controller supports HS200 and DDR modes. (Since some of the boards like am57xx-evm reva3, beagle-x15 and am57xx idk has 3.3v line connected to IO lines, HS200 cannot be supported in these boards). MMC3 controller supports SDR12, SDR25 and SDR50 modes. MMC4 controller supports SDR12 and SDR25 modes. Add these supported modes in device-tree file. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sekhar Nori --- arch/arm/boot/dts/am571x-idk.dts | 1 + arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts | 1 + arch/arm/boot/dts/am57xx-beagle-x15.dts | 6 ++++++ arch/arm/boot/dts/am57xx-idk-common.dtsi | 1 + arch/arm/boot/dts/dra7.dtsi | 14 ++++++++++++++ 5 files changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts index 875291d1bdd7..bdf39d47948f 100644 --- a/arch/arm/boot/dts/am571x-idk.dts +++ b/arch/arm/boot/dts/am571x-idk.dts @@ -90,4 +90,5 @@ pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; + /delete-property/ mmc-hs200-1_8v; }; diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts index d1786a8af7ae..e26d3bdda8f2 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts @@ -36,6 +36,7 @@ pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>; + /delete-property/ mmc-hs200-1_8v; }; /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */ diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index d6689106d2a8..8d9bdf10a7be 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -25,6 +25,11 @@ pinctrl-1 = <&mmc1_pins_hs>; vmmc-supply = <&ldo1_reg>; + /delete-property/ sd-uhs-sdr104; + /delete-property/ sd-uhs-sdr50; + /delete-property/ sd-uhs-ddr50; + /delete-property/ sd-uhs-sdr25; + /delete-property/ sd-uhs-sdr12; }; &mmc2 { @@ -32,6 +37,7 @@ pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>; + /delete-property/ mmc-hs200-1_8v; }; /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */ diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi index 0270b01a8e1d..5d6965ab7339 100644 --- a/arch/arm/boot/dts/am57xx-idk-common.dtsi +++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi @@ -413,6 +413,7 @@ bus-width = <8>; ti,non-removable; max-frequency = <96000000>; + /delete-property/ mmc-hs200-1_8v; }; &dcan1 { diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 40b9eb96cdeb..b813db662caf 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1046,6 +1046,11 @@ status = "disabled"; pbias-supply = <&pbias_mmc_reg>; max-frequency = <192000000>; + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr25; + sd-uhs-sdr12; }; mmc2: mmc@480b4000 { @@ -1058,6 +1063,10 @@ dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + sd-uhs-sdr25; + sd-uhs-sdr12; + mmc-hs200-1_8v; + mmc-ddr-1_8v; }; mmc3: mmc@480ad000 { @@ -1071,6 +1080,9 @@ status = "disabled"; /* Errata i887 limits max-frequency of MMC3 to 64 MHz */ max-frequency = <64000000>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; }; mmc4: mmc@480d1000 { @@ -1083,6 +1095,8 @@ dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + sd-uhs-sdr12; + sd-uhs-sdr25; }; mmu0_dsp1: mmu@40d01000 {