From patchwork Tue Dec 5 12:37:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 10092829 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6F0FC605B4 for ; Tue, 5 Dec 2017 12:38:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6EE8A2893F for ; Tue, 5 Dec 2017 12:38:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 63EC329566; Tue, 5 Dec 2017 12:38:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F6182893F for ; Tue, 5 Dec 2017 12:38:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752588AbdLEMiM (ORCPT ); Tue, 5 Dec 2017 07:38:12 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:60439 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752562AbdLEMiL (ORCPT ); Tue, 5 Dec 2017 07:38:11 -0500 Received: from penelope.horms.nl (unknown [217.111.208.18]) by kirsty.vergenet.net (Postfix) with ESMTPA id D145625B806; Tue, 5 Dec 2017 23:38:05 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1512477486; bh=Gxcjzu6RPTXfbvUGsNkyHxOeaje+C+TW6J2/HKsO+nE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=azfnX0E0yjN/kbAeewe8qCZS7UxJzKAPHQhzeV2JqQB+rLXJVDwSz5Eqr8pS8I1rh x728R6N0BEqXbKrvt6kfpP7w1bbO40ZmyrxQJUF9GwjfO4K45sGgWU7poB7lhjfNmE cJyrN0apYlpdtHtl5txfbddNtSi+SD+0uPx9Dahg= Received: by penelope.horms.nl (Postfix, from userid 7100) id BCE6CE21AF9; Tue, 5 Dec 2017 13:38:00 +0100 (CET) From: Simon Horman To: Wolfram Sang , Ulf Hansson Cc: Magnus Damm , linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Ai Kyuse , Masaharu Hayakawa , Simon Horman Subject: [PATCH/RFT 1/3] mmc: tmio: Add eMMC HS400 mode support Date: Tue, 5 Dec 2017 13:37:54 +0100 Message-Id: <20171205123756.18424-2-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171205123756.18424-1-horms+renesas@verge.net.au> References: <20171205123756.18424-1-horms+renesas@verge.net.au> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ai Kyuse Add eMMC HS400 support to the core TMIO code. Regarding tuning: Tune in HS200 mode before changing to HS400 mode. When retuning, return to HS200 mode and tune. HS400 and HS200/SDR104 have different CPG settings, HS400 sets to 400MHz to distinguish the CPG settings. Signed-off-by: Ai Kyuse Signed-off-by: Masaharu Hayakawa Signed-off-by: Simon Horman --- v1 [Simon Horman] - Combined patches by Ai Kyuse and Masaharu Hayakawa. - Rebase - Minor clean-up v0 [Ai Kyuse] --- drivers/mmc/host/tmio_mmc.h | 5 +++++ drivers/mmc/host/tmio_mmc_core.c | 29 +++++++++++++++++++++++++++-- 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index 3e6ff8921440..60f5935db368 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -46,6 +46,7 @@ #define CTL_DMA_ENABLE 0xd8 #define CTL_RESET_SD 0xe0 #define CTL_VERSION 0xe2 +#define CTL_SDIF_MODE 0xe6 #define CTL_SDIO_REGS 0x100 #define CTL_CLK_AND_WAIT_CTL 0x138 #define CTL_RESET_SDIO 0x1e0 @@ -203,6 +204,10 @@ struct tmio_mmc_host { /* Tuning values: 1 for success, 0 for failure */ DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long)); unsigned int tap_num; + unsigned long tap_set; + void (*prepare_hs400_tuning)(struct mmc_host *mmc, struct mmc_ios *ios); + void (*reset_hs400_mode)(struct mmc_host *mmc); + void (*disable_scc)(struct mmc_host *mmc); const struct tmio_mmc_dma_ops *dma_ops; }; diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c index d6ca57be16c2..a65c10302904 100644 --- a/drivers/mmc/host/tmio_mmc_core.c +++ b/drivers/mmc/host/tmio_mmc_core.c @@ -199,6 +199,13 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, tmio_mmc_clk_stop(host); return; } + /* + * Both HS400 and HS200/SD104 set 200MHz, but HS400 sets 400MHz + * to distinguish the CPG settings. + */ + if (host->mmc->ios.timing == MMC_TIMING_MMC_HS400 && + new_clock == 200000000) + new_clock = 400000000; if (host->clk_update) clock = host->clk_update(host, new_clock) / 512; @@ -209,8 +216,13 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, clock <<= 1; /* 1/1 clock is option */ - if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1)) - clk |= 0xff; + if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && + ((clk >> 22) & 0x1)) { + if (!(host->mmc->ios.timing == MMC_TIMING_MMC_HS400)) + clk |= 0xff; + else + clk &= ~0xff; + } if (host->set_clk_div) host->set_clk_div(host->pdev, (clk >> 22) & 1); @@ -1015,6 +1027,15 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) struct device *dev = &host->pdev->dev; unsigned long flags; + + if (ios->timing != MMC_TIMING_UHS_SDR104 && + ios->timing != MMC_TIMING_MMC_HS200 && + ios->timing != MMC_TIMING_MMC_HS400 && host->disable_scc) + host->disable_scc(mmc); + + if (ios->timing != MMC_TIMING_MMC_HS400 && host->reset_hs400_mode) + host->reset_hs400_mode(mmc); + mutex_lock(&host->ios_lock); spin_lock_irqsave(&host->lock, flags); @@ -1065,6 +1086,10 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) "%s.%d: IOS interrupted: clk %u, mode %u", current->comm, task_pid_nr(current), ios->clock, ios->power_mode); + + if (ios->timing == MMC_TIMING_MMC_HS400 && host->prepare_hs400_tuning) + host->prepare_hs400_tuning(mmc, ios); + host->mrq = NULL; host->clk_cache = ios->clock;