| Message ID | 20190416185705.256369-1-rrangel@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] mmc: core: Verify SD bus width | expand |
> > The SD Physical Layer Spec says the following: Since the SD Memory Card > shall support at least the two bus modes 1-bit or 4-bit width, then any SD > Card shall set at least bits 0 and 2 (SD_BUS_WIDTH="0101"). > > This change verifies the card has specified a bus width. > > AMD SDHC Device 7806 can get into a bad state after a card disconnect > where anything transferred via the DATA lines will always result in a > zero filled buffer. Currently the driver will continue without error if > the HC is in this condition. A block device will be created, but reading > from it will result in a zero buffer. This makes it seem like the SD > device has been erased, when in actuality the data is never getting > copied from the DATA lines to the data buffer. > > SCR is the first command in the SD initialization sequence that uses the > DATA lines. By checking that the response was invalid, we can abort > mounting the card. > > Acked-by: Avri Altman <avri.altman@wdc.com> > > Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Avri Altman <avri.altman@wdc.com> Thanks, Avri
On Thu, Apr 18, 2019 at 06:20:26AM +0000, Avri Altman wrote: > > > > The SD Physical Layer Spec says the following: Since the SD Memory Card > > shall support at least the two bus modes 1-bit or 4-bit width, then any SD > > Card shall set at least bits 0 and 2 (SD_BUS_WIDTH="0101"). > > > > This change verifies the card has specified a bus width. > > > > AMD SDHC Device 7806 can get into a bad state after a card disconnect > > where anything transferred via the DATA lines will always result in a > > zero filled buffer. Currently the driver will continue without error if > > the HC is in this condition. A block device will be created, but reading > > from it will result in a zero buffer. This makes it seem like the SD > > device has been erased, when in actuality the data is never getting > > copied from the DATA lines to the data buffer. > > > > SCR is the first command in the SD initialization sequence that uses the > > DATA lines. By checking that the response was invalid, we can abort > > mounting the card. > > > > Acked-by: Avri Altman <avri.altman@wdc.com> > > > > Signed-off-by: Raul E Rangel <rrangel@chromium.org> > Reviewed-by: Avri Altman <avri.altman@wdc.com> > > Thanks, > Avri Thanks for the review. Should I rebase this on master so it applies cleanly without the MMC trace patches? Raul
On Wed, 24 Apr 2019 at 17:57, Raul Rangel <rrangel@chromium.org> wrote: > > On Thu, Apr 18, 2019 at 06:20:26AM +0000, Avri Altman wrote: > > > > > > The SD Physical Layer Spec says the following: Since the SD Memory Card > > > shall support at least the two bus modes 1-bit or 4-bit width, then any SD > > > Card shall set at least bits 0 and 2 (SD_BUS_WIDTH="0101"). > > > > > > This change verifies the card has specified a bus width. > > > > > > AMD SDHC Device 7806 can get into a bad state after a card disconnect > > > where anything transferred via the DATA lines will always result in a > > > zero filled buffer. Currently the driver will continue without error if > > > the HC is in this condition. A block device will be created, but reading > > > from it will result in a zero buffer. This makes it seem like the SD > > > device has been erased, when in actuality the data is never getting > > > copied from the DATA lines to the data buffer. > > > > > > SCR is the first command in the SD initialization sequence that uses the > > > DATA lines. By checking that the response was invalid, we can abort > > > mounting the card. > > > > > > Acked-by: Avri Altman <avri.altman@wdc.com> > > > > > > Signed-off-by: Raul E Rangel <rrangel@chromium.org> > > Reviewed-by: Avri Altman <avri.altman@wdc.com> > > > > Thanks, > > Avri > Thanks for the review. Should I rebase this on master so it applies > cleanly without the MMC trace patches? Yes, please do! Kind regards Uffe
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 3b2e09fa72c5..a73f3dbb6029 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -229,6 +229,13 @@ static int mmc_decode_scr(struct mmc_card *card) trace_sd_scr(card, scr); + /* SD Spec says: any SD Card shall set at least bits 0 and 2 */ + if (!(scr->bus_widths & SD_SCR_BUS_WIDTH_1) || + !(scr->bus_widths & SD_SCR_BUS_WIDTH_4)) { + pr_err("%s: invalid bus width\n", mmc_hostname(card->host)); + return -EINVAL; + } + return 0; }