| Message ID | 20191203203301.2202-3-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | mmc: renesas_sdhi: add manual correction | expand |
enforce?
Gr{oetje,eeting}s,
Geert
Hi Wolfram-san, > From: Wolfram Sang, Sent: Wednesday, December 4, 2019 5:33 AM > > HW engineers say that automatic tap correction cannot be used for HS400 > in all R-Car Gen3 SoCs. So, check for that SDHI variant and disable it > when HS400 is about to be enabled. > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > --- > > The BSP handles this differently and adds a quirk entry to every > soc_device_match and checks the quirk entry. I chose this less intrusive > method because all Gen3 SoCs are affected. But not all SDHI instances, > only those which can access eMMC, of course. So, I likes this approach a > tad better. If you think all quirks should be centralized in the quirks > structure, I am open for discussion. Thank you for the patch! I agreed your choice. If we had a SoC which can use auto correction, we could add such a quirk at that timing :) So, Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Best regards, Yoshihiro Shimoda
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 903da3ba399b..a29290ee2051 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -343,6 +343,12 @@ static void renesas_sdhi_hs400_complete(struct tmio_mmc_host *host) sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, priv->scc_tappos_hs400); + /* Gen3 can't do automatic tap correction with HS400, so disable it */ + if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC) + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL, + ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN & + sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2, (SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN | SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) |
HW engineers say that automatic tap correction cannot be used for HS400 in all R-Car Gen3 SoCs. So, check for that SDHI variant and disable it when HS400 is about to be enabled. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- The BSP handles this differently and adds a quirk entry to every soc_device_match and checks the quirk entry. I chose this less intrusive method because all Gen3 SoCs are affected. But not all SDHI instances, only those which can access eMMC, of course. So, I likes this approach a tad better. If you think all quirks should be centralized in the quirks structure, I am open for discussion. drivers/mmc/host/renesas_sdhi_core.c | 6 ++++++ 1 file changed, 6 insertions(+)