diff mbox series

[1/2] mmc: sdhci-of-esdhc: fix esdhc_reset() for different controller versions

Message ID 20191224084122.25381-1-yangbo.lu@nxp.com (mailing list archive)
State New, archived
Headers show
Series [1/2] mmc: sdhci-of-esdhc: fix esdhc_reset() for different controller versions | expand

Commit Message

Yangbo Lu Dec. 24, 2019, 8:41 a.m. UTC 
This patch is to fix operating in esdhc_reset() for different
controller versions, and to add bus-width restoring after data
reset for eSDHC (verdor version <= 2.2).

Also add annotation for understanding.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
 drivers/mmc/host/sdhci-of-esdhc.c | 38 ++++++++++++++++++++++++++++++++++----
 1 file changed, 34 insertions(+), 4 deletions(-)

Comments

Adrian Hunter Jan. 7, 2020, 12:23 p.m. UTC | #1 
On 24/12/19 10:41 am, Yangbo Lu wrote:
> This patch is to fix operating in esdhc_reset() for different
> controller versions, and to add bus-width restoring after data
> reset for eSDHC (verdor version <= 2.2).
> 
> Also add annotation for understanding.
> 
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

One minor cosmetic comment below, otherwise:

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-of-esdhc.c | 38 ++++++++++++++++++++++++++++++++++----
>  1 file changed, 34 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
> index cd3b676..502e317 100644
> --- a/drivers/mmc/host/sdhci-of-esdhc.c
> +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> @@ -758,23 +758,53 @@ static void esdhc_reset(struct sdhci_host *host, u8 mask)
>  {
>  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
>  	struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
> -	u32 val;
> +	u32 val, bus_width = 0;
>  
> +	/* Add delay to make sure all the DMA transfers are finished
> +	 * for quirk.
> +	 */

sdhci-of-esdhc.c seems to have a mix of multi-line comment styles.
The preferred style is documented in Documentation/process/coding-style.rst

>  	if (esdhc->quirk_delay_before_data_reset &&
>  	    (mask & SDHCI_RESET_DATA) &&
>  	    (host->flags & SDHCI_REQ_USE_DMA))
>  		mdelay(5);
>  
> +	/* Save bus-width for eSDHC whose vendor version is 2.2
> +	 * or lower for data reset.
> +	 */
> +	if ((mask & SDHCI_RESET_DATA) &&
> +	    (esdhc->vendor_ver <= VENDOR_V_22)) {
> +		val = sdhci_readl(host, ESDHC_PROCTL);
> +		bus_width = val & ESDHC_CTRL_BUSWIDTH_MASK;
> +	}
> +
>  	sdhci_reset(host, mask);
>  
> -	sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
> -	sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
> +	/* Restore bus-width setting and interrupt registers for eSDHC
> +	 * whose vendor version is 2.2 or lower for data reset.
> +	 */
> +	if ((mask & SDHCI_RESET_DATA) &&
> +	    (esdhc->vendor_ver <= VENDOR_V_22)) {
> +		val = sdhci_readl(host, ESDHC_PROCTL);
> +		val &= ~ESDHC_CTRL_BUSWIDTH_MASK;
> +		val |= bus_width;
> +		sdhci_writel(host, val, ESDHC_PROCTL);
> +
> +		sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
> +		sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
> +	}
>  
> -	if (mask & SDHCI_RESET_ALL) {
> +	/* Some bits have to be cleaned manually for eSDHC whose spec
> +	 * version is higher than 3.0 for all reset.
> +	 */
> +	if ((mask & SDHCI_RESET_ALL) &&
> +	    (esdhc->spec_ver >= SDHCI_SPEC_300)) {
>  		val = sdhci_readl(host, ESDHC_TBCTL);
>  		val &= ~ESDHC_TB_EN;
>  		sdhci_writel(host, val, ESDHC_TBCTL);
>  
> +		/* Initialize eSDHC_DLLCFG1[DLL_PD_PULSE_STRETCH_SEL] to
> +		 * 0 for quirk.
> +		 */
>  		if (esdhc->quirk_unreliable_pulse_detection) {
>  			val = sdhci_readl(host, ESDHC_DLLCFG1);
>  			val &= ~ESDHC_DLL_PD_PULSE_STRETCH_SEL;
>
Yangbo Lu Jan. 8, 2020, 4:10 a.m. UTC | #2 
> -----Original Message-----
> From: linux-mmc-owner@vger.kernel.org <linux-mmc-owner@vger.kernel.org>
> On Behalf Of Adrian Hunter
> Sent: Tuesday, January 7, 2020 8:23 PM
> To: Y.b. Lu <yangbo.lu@nxp.com>; linux-mmc@vger.kernel.org; Ulf Hansson
> <ulf.hansson@linaro.org>
> Subject: Re: [PATCH 1/2] mmc: sdhci-of-esdhc: fix esdhc_reset() for different
> controller versions
> 
> On 24/12/19 10:41 am, Yangbo Lu wrote:
> > This patch is to fix operating in esdhc_reset() for different
> > controller versions, and to add bus-width restoring after data
> > reset for eSDHC (verdor version <= 2.2).
> >
> > Also add annotation for understanding.
> >
> > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> 
> One minor cosmetic comment below, otherwise:
> 
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> 
> > ---
> >  drivers/mmc/host/sdhci-of-esdhc.c | 38
> ++++++++++++++++++++++++++++++++++----
> >  1 file changed, 34 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
> b/drivers/mmc/host/sdhci-of-esdhc.c
> > index cd3b676..502e317 100644
> > --- a/drivers/mmc/host/sdhci-of-esdhc.c
> > +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> > @@ -758,23 +758,53 @@ static void esdhc_reset(struct sdhci_host *host,
> u8 mask)
> >  {
> >  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> >  	struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
> > -	u32 val;
> > +	u32 val, bus_width = 0;
> >
> > +	/* Add delay to make sure all the DMA transfers are finished
> > +	 * for quirk.
> > +	 */
> 
> sdhci-of-esdhc.c seems to have a mix of multi-line comment styles.
> The preferred style is documented in Documentation/process/coding-style.rst

Thanks Adrian.
You are right. I was using preferred comment style for net/.
I sent out v2 to fix the comments.

- Yangbo Lu

> 
> >  	if (esdhc->quirk_delay_before_data_reset &&
> >  	    (mask & SDHCI_RESET_DATA) &&
> >  	    (host->flags & SDHCI_REQ_USE_DMA))
> >  		mdelay(5);
> >
> > +	/* Save bus-width for eSDHC whose vendor version is 2.2
> > +	 * or lower for data reset.
> > +	 */
> > +	if ((mask & SDHCI_RESET_DATA) &&
> > +	    (esdhc->vendor_ver <= VENDOR_V_22)) {
> > +		val = sdhci_readl(host, ESDHC_PROCTL);
> > +		bus_width = val & ESDHC_CTRL_BUSWIDTH_MASK;
> > +	}
> > +
> >  	sdhci_reset(host, mask);
> >
> > -	sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
> > -	sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
> > +	/* Restore bus-width setting and interrupt registers for eSDHC
> > +	 * whose vendor version is 2.2 or lower for data reset.
> > +	 */
> > +	if ((mask & SDHCI_RESET_DATA) &&
> > +	    (esdhc->vendor_ver <= VENDOR_V_22)) {
> > +		val = sdhci_readl(host, ESDHC_PROCTL);
> > +		val &= ~ESDHC_CTRL_BUSWIDTH_MASK;
> > +		val |= bus_width;
> > +		sdhci_writel(host, val, ESDHC_PROCTL);
> > +
> > +		sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
> > +		sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
> > +	}
> >
> > -	if (mask & SDHCI_RESET_ALL) {
> > +	/* Some bits have to be cleaned manually for eSDHC whose spec
> > +	 * version is higher than 3.0 for all reset.
> > +	 */
> > +	if ((mask & SDHCI_RESET_ALL) &&
> > +	    (esdhc->spec_ver >= SDHCI_SPEC_300)) {
> >  		val = sdhci_readl(host, ESDHC_TBCTL);
> >  		val &= ~ESDHC_TB_EN;
> >  		sdhci_writel(host, val, ESDHC_TBCTL);
> >
> > +		/* Initialize eSDHC_DLLCFG1[DLL_PD_PULSE_STRETCH_SEL] to
> > +		 * 0 for quirk.
> > +		 */
> >  		if (esdhc->quirk_unreliable_pulse_detection) {
> >  			val = sdhci_readl(host, ESDHC_DLLCFG1);
> >  			val &= ~ESDHC_DLL_PD_PULSE_STRETCH_SEL;
> >
diff mbox series

Patch

diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index cd3b676..502e317 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -758,23 +758,53 @@  static void esdhc_reset(struct sdhci_host *host, u8 mask)
 {
 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
-	u32 val;
+	u32 val, bus_width = 0;
 
+	/* Add delay to make sure all the DMA transfers are finished
+	 * for quirk.
+	 */
 	if (esdhc->quirk_delay_before_data_reset &&
 	    (mask & SDHCI_RESET_DATA) &&
 	    (host->flags & SDHCI_REQ_USE_DMA))
 		mdelay(5);
 
+	/* Save bus-width for eSDHC whose vendor version is 2.2
+	 * or lower for data reset.
+	 */
+	if ((mask & SDHCI_RESET_DATA) &&
+	    (esdhc->vendor_ver <= VENDOR_V_22)) {
+		val = sdhci_readl(host, ESDHC_PROCTL);
+		bus_width = val & ESDHC_CTRL_BUSWIDTH_MASK;
+	}
+
 	sdhci_reset(host, mask);
 
-	sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
-	sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
+	/* Restore bus-width setting and interrupt registers for eSDHC
+	 * whose vendor version is 2.2 or lower for data reset.
+	 */
+	if ((mask & SDHCI_RESET_DATA) &&
+	    (esdhc->vendor_ver <= VENDOR_V_22)) {
+		val = sdhci_readl(host, ESDHC_PROCTL);
+		val &= ~ESDHC_CTRL_BUSWIDTH_MASK;
+		val |= bus_width;
+		sdhci_writel(host, val, ESDHC_PROCTL);
+
+		sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
+		sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
+	}
 
-	if (mask & SDHCI_RESET_ALL) {
+	/* Some bits have to be cleaned manually for eSDHC whose spec
+	 * version is higher than 3.0 for all reset.
+	 */
+	if ((mask & SDHCI_RESET_ALL) &&
+	    (esdhc->spec_ver >= SDHCI_SPEC_300)) {
 		val = sdhci_readl(host, ESDHC_TBCTL);
 		val &= ~ESDHC_TB_EN;
 		sdhci_writel(host, val, ESDHC_TBCTL);
 
+		/* Initialize eSDHC_DLLCFG1[DLL_PD_PULSE_STRETCH_SEL] to
+		 * 0 for quirk.
+		 */
 		if (esdhc->quirk_unreliable_pulse_detection) {
 			val = sdhci_readl(host, ESDHC_DLLCFG1);
 			val &= ~ESDHC_DLL_PD_PULSE_STRETCH_SEL;