diff mbox series

mmc: sdhci-pci-gli: Fix can not access GL9750 after reboot from Windows 10

Message ID 20200504063957.6638-1-benchuanggli@gmail.com (mailing list archive)
State New, archived
Headers show
Series mmc: sdhci-pci-gli: Fix can not access GL9750 after reboot from Windows 10 | expand

Commit Message

Ben Chuang May 4, 2020, 6:39 a.m. UTC 
From: Ben Chuang <ben.chuang@genesyslogic.com.tw>

Need to clear some bits in a vendor-defined register after reboot from
Windows 10.

Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
Reported-by: Grzegorz Kowal <custos.mentis@gmail.com>
Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
---
 drivers/mmc/host/sdhci-pci-gli.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Adrian Hunter May 4, 2020, 7:27 a.m. UTC | #1 
On 4/05/20 9:39 am, Ben Chuang wrote:
> From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
> 
> Need to clear some bits in a vendor-defined register after reboot from
> Windows 10.
> 
> Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
> Reported-by: Grzegorz Kowal <custos.mentis@gmail.com>
> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-pci-gli.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index ce15a05f23d4..8170b659f2af 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -26,6 +26,9 @@
>  #define   SDHCI_GLI_9750_DRIVING_2    GENMASK(27, 26)
>  #define   GLI_9750_DRIVING_1_VALUE    0xFFF
>  #define   GLI_9750_DRIVING_2_VALUE    0x3
> +#define   SDHCI_GLI_9750_SEL_1        BIT(29)
> +#define   SDHCI_GLI_9750_SEL_2        BIT(31)
> +#define   SDHCI_GLI_9750_ALL_RST      (BIT(24)|BIT(25)|BIT(28)|BIT(30))
>  
>  #define SDHCI_GLI_9750_PLL	      0x864
>  #define   SDHCI_GLI_9750_PLL_TX2_INV    BIT(23)
> @@ -122,6 +125,8 @@ static void gli_set_9750(struct sdhci_host *host)
>  				    GLI_9750_DRIVING_1_VALUE);
>  	driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2,
>  				    GLI_9750_DRIVING_2_VALUE);
> +	driving_value &= ~(SDHCI_GLI_9750_SEL_1|SDHCI_GLI_9750_SEL_2|SDHCI_GLI_9750_ALL_RST);
> +	driving_value |= SDHCI_GLI_9750_SEL_2;
>  	sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING);
>  
>  	sw_ctrl_value &= ~SDHCI_GLI_9750_SW_CTRL_4;
>
Grzegorz Kowal May 5, 2020, 9:15 a.m. UTC | #2 
Tested-by: Grzegorz Kowal <custos.mentis@gmail.com>

Thanks,
Grzegorz

On Mon, May 4, 2020 at 4:26 AM Adrian Hunter <adrian.hunter@intel.com> wrote:
>
> On 4/05/20 9:39 am, Ben Chuang wrote:
> > From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
> >
> > Need to clear some bits in a vendor-defined register after reboot from
> > Windows 10.
> >
> > Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
> > Reported-by: Grzegorz Kowal <custos.mentis@gmail.com>
> > Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
>
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
>
> > ---
> >  drivers/mmc/host/sdhci-pci-gli.c | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> > index ce15a05f23d4..8170b659f2af 100644
> > --- a/drivers/mmc/host/sdhci-pci-gli.c
> > +++ b/drivers/mmc/host/sdhci-pci-gli.c
> > @@ -26,6 +26,9 @@
> >  #define   SDHCI_GLI_9750_DRIVING_2    GENMASK(27, 26)
> >  #define   GLI_9750_DRIVING_1_VALUE    0xFFF
> >  #define   GLI_9750_DRIVING_2_VALUE    0x3
> > +#define   SDHCI_GLI_9750_SEL_1        BIT(29)
> > +#define   SDHCI_GLI_9750_SEL_2        BIT(31)
> > +#define   SDHCI_GLI_9750_ALL_RST      (BIT(24)|BIT(25)|BIT(28)|BIT(30))
> >
> >  #define SDHCI_GLI_9750_PLL         0x864
> >  #define   SDHCI_GLI_9750_PLL_TX2_INV    BIT(23)
> > @@ -122,6 +125,8 @@ static void gli_set_9750(struct sdhci_host *host)
> >                                   GLI_9750_DRIVING_1_VALUE);
> >       driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2,
> >                                   GLI_9750_DRIVING_2_VALUE);
> > +     driving_value &= ~(SDHCI_GLI_9750_SEL_1|SDHCI_GLI_9750_SEL_2|SDHCI_GLI_9750_ALL_RST);
> > +     driving_value |= SDHCI_GLI_9750_SEL_2;
> >       sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING);
> >
> >       sw_ctrl_value &= ~SDHCI_GLI_9750_SW_CTRL_4;
> >
>
Ulf Hansson May 5, 2020, 11:32 a.m. UTC | #3 
On Mon, 4 May 2020 at 08:41, Ben Chuang <benchuanggli@gmail.com> wrote:
>
> From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
>
> Need to clear some bits in a vendor-defined register after reboot from
> Windows 10.
>
> Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
> Reported-by: Grzegorz Kowal <custos.mentis@gmail.com>
> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>

Applied for fixes, thanks!

Kind regards
Uffe


> ---
>  drivers/mmc/host/sdhci-pci-gli.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index ce15a05f23d4..8170b659f2af 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -26,6 +26,9 @@
>  #define   SDHCI_GLI_9750_DRIVING_2    GENMASK(27, 26)
>  #define   GLI_9750_DRIVING_1_VALUE    0xFFF
>  #define   GLI_9750_DRIVING_2_VALUE    0x3
> +#define   SDHCI_GLI_9750_SEL_1        BIT(29)
> +#define   SDHCI_GLI_9750_SEL_2        BIT(31)
> +#define   SDHCI_GLI_9750_ALL_RST      (BIT(24)|BIT(25)|BIT(28)|BIT(30))
>
>  #define SDHCI_GLI_9750_PLL           0x864
>  #define   SDHCI_GLI_9750_PLL_TX2_INV    BIT(23)
> @@ -122,6 +125,8 @@ static void gli_set_9750(struct sdhci_host *host)
>                                     GLI_9750_DRIVING_1_VALUE);
>         driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2,
>                                     GLI_9750_DRIVING_2_VALUE);
> +       driving_value &= ~(SDHCI_GLI_9750_SEL_1|SDHCI_GLI_9750_SEL_2|SDHCI_GLI_9750_ALL_RST);
> +       driving_value |= SDHCI_GLI_9750_SEL_2;
>         sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING);
>
>         sw_ctrl_value &= ~SDHCI_GLI_9750_SW_CTRL_4;
> --
> 2.26.2
>
diff mbox series

Patch

diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index ce15a05f23d4..8170b659f2af 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -26,6 +26,9 @@ 
 #define   SDHCI_GLI_9750_DRIVING_2    GENMASK(27, 26)
 #define   GLI_9750_DRIVING_1_VALUE    0xFFF
 #define   GLI_9750_DRIVING_2_VALUE    0x3
+#define   SDHCI_GLI_9750_SEL_1        BIT(29)
+#define   SDHCI_GLI_9750_SEL_2        BIT(31)
+#define   SDHCI_GLI_9750_ALL_RST      (BIT(24)|BIT(25)|BIT(28)|BIT(30))
 
 #define SDHCI_GLI_9750_PLL	      0x864
 #define   SDHCI_GLI_9750_PLL_TX2_INV    BIT(23)
@@ -122,6 +125,8 @@  static void gli_set_9750(struct sdhci_host *host)
 				    GLI_9750_DRIVING_1_VALUE);
 	driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2,
 				    GLI_9750_DRIVING_2_VALUE);
+	driving_value &= ~(SDHCI_GLI_9750_SEL_1|SDHCI_GLI_9750_SEL_2|SDHCI_GLI_9750_ALL_RST);
+	driving_value |= SDHCI_GLI_9750_SEL_2;
 	sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING);
 
 	sw_ctrl_value &= ~SDHCI_GLI_9750_SW_CTRL_4;