diff mbox series

mmc: renesas_sdhi: newer SoCs don't need manual tap correction

Message ID 20220720072901.1266-1-wsa+renesas@sang-engineering.com (mailing list archive)
State New, archived
Headers show
Series mmc: renesas_sdhi: newer SoCs don't need manual tap correction | expand

Commit Message

Wolfram Sang July 20, 2022, 7:29 a.m. UTC 
From: Takeshi Saito <takeshi.saito.xv@renesas.com>

The newest Gen3 SoCs and Gen4 SoCs do not need manual tap correction
with HS400 anymore. So, instead of checking the SDHI version, add a
quirk flag and set manual tap correction only for affected SoCs.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: rebased, renamed the quirk variable, removed stale comment]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/mmc/host/renesas_sdhi.h               | 1 +
 drivers/mmc/host/renesas_sdhi_core.c          | 5 ++---
 drivers/mmc/host/renesas_sdhi_internal_dmac.c | 6 ++++++
 3 files changed, 9 insertions(+), 3 deletions(-)

Comments

Yoshihiro Shimoda July 21, 2022, 2:09 a.m. UTC | #1 
Hi Wolfram-san,

> From: Wolfram Sang, Sent: Wednesday, July 20, 2022 4:29 PM
> 
> From: Takeshi Saito <takeshi.saito.xv@renesas.com>
> 
> The newest Gen3 SoCs and Gen4 SoCs do not need manual tap correction
> with HS400 anymore. So, instead of checking the SDHI version, add a
> quirk flag and set manual tap correction only for affected SoCs.
> 
> Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
> [wsa: rebased, renamed the quirk variable, removed stale comment]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thank you for the patch! It looks good to me. And, I tested on
r8a77951-salvator-xs and r8a779f0-spider, and it worked. So,

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda
Ulf Hansson July 21, 2022, 4:13 p.m. UTC | #2 
On Wed, 20 Jul 2022 at 09:29, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
>
> From: Takeshi Saito <takeshi.saito.xv@renesas.com>
>
> The newest Gen3 SoCs and Gen4 SoCs do not need manual tap correction
> with HS400 anymore. So, instead of checking the SDHI version, add a
> quirk flag and set manual tap correction only for affected SoCs.
>
> Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
> [wsa: rebased, renamed the quirk variable, removed stale comment]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Applied for next, thanks!

Kind regards
Uffe


> ---
>  drivers/mmc/host/renesas_sdhi.h               | 1 +
>  drivers/mmc/host/renesas_sdhi_core.c          | 5 ++---
>  drivers/mmc/host/renesas_sdhi_internal_dmac.c | 6 ++++++
>  3 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
> index 1a1e3e020a8c..c4abfee1ebae 100644
> --- a/drivers/mmc/host/renesas_sdhi.h
> +++ b/drivers/mmc/host/renesas_sdhi.h
> @@ -43,6 +43,7 @@ struct renesas_sdhi_quirks {
>         bool hs400_4taps;
>         bool fixed_addr_mode;
>         bool dma_one_rx_only;
> +       bool manual_tap_correction;
>         u32 hs400_bad_taps;
>         const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
>  };
> diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
> index 55f7b27c3de7..6edbf5c161ab 100644
> --- a/drivers/mmc/host/renesas_sdhi_core.c
> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -380,8 +380,7 @@ static void renesas_sdhi_hs400_complete(struct mmc_host *mmc)
>         sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF,
>                        priv->scc_tappos_hs400);
>
> -       /* Gen3 can't do automatic tap correction with HS400, so disable it */
> -       if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC)
> +       if (priv->quirks && priv->quirks->manual_tap_correction)
>                 sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
>                                ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
>                                sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
> @@ -718,7 +717,7 @@ static bool renesas_sdhi_manual_correction(struct tmio_mmc_host *host, bool use_
>         sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0);
>
>         /* Change TAP position according to correction status */
> -       if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC &&
> +       if (priv->quirks && priv->quirks->manual_tap_correction &&
>             host->mmc->ios.timing == MMC_TIMING_MMC_HS400) {
>                 u32 bad_taps = priv->quirks ? priv->quirks->hs400_bad_taps : 0;
>                 /*
> diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> index 0ccdbe3010ee..42937596c4c4 100644
> --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> @@ -170,6 +170,7 @@ static const struct renesas_sdhi_quirks sdhi_quirks_4tap_nohs400_one_rx = {
>  static const struct renesas_sdhi_quirks sdhi_quirks_4tap = {
>         .hs400_4taps = true,
>         .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
> +       .manual_tap_correction = true,
>  };
>
>  static const struct renesas_sdhi_quirks sdhi_quirks_nohs400 = {
> @@ -182,25 +183,30 @@ static const struct renesas_sdhi_quirks sdhi_quirks_fixed_addr = {
>
>  static const struct renesas_sdhi_quirks sdhi_quirks_bad_taps1357 = {
>         .hs400_bad_taps = BIT(1) | BIT(3) | BIT(5) | BIT(7),
> +       .manual_tap_correction = true,
>  };
>
>  static const struct renesas_sdhi_quirks sdhi_quirks_bad_taps2367 = {
>         .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
> +       .manual_tap_correction = true,
>  };
>
>  static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es13 = {
>         .hs400_4taps = true,
>         .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
>         .hs400_calib_table = r8a7796_es13_calib_table,
> +       .manual_tap_correction = true,
>  };
>
>  static const struct renesas_sdhi_quirks sdhi_quirks_r8a77965 = {
>         .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
>         .hs400_calib_table = r8a77965_calib_table,
> +       .manual_tap_correction = true,
>  };
>
>  static const struct renesas_sdhi_quirks sdhi_quirks_r8a77990 = {
>         .hs400_calib_table = r8a77990_calib_table,
> +       .manual_tap_correction = true,
>  };
>
>  /*
> --
> 2.35.1
>
diff mbox series

Patch

diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
index 1a1e3e020a8c..c4abfee1ebae 100644
--- a/drivers/mmc/host/renesas_sdhi.h
+++ b/drivers/mmc/host/renesas_sdhi.h
@@ -43,6 +43,7 @@  struct renesas_sdhi_quirks {
 	bool hs400_4taps;
 	bool fixed_addr_mode;
 	bool dma_one_rx_only;
+	bool manual_tap_correction;
 	u32 hs400_bad_taps;
 	const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
 };
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 55f7b27c3de7..6edbf5c161ab 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -380,8 +380,7 @@  static void renesas_sdhi_hs400_complete(struct mmc_host *mmc)
 	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF,
 		       priv->scc_tappos_hs400);
 
-	/* Gen3 can't do automatic tap correction with HS400, so disable it */
-	if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC)
+	if (priv->quirks && priv->quirks->manual_tap_correction)
 		sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
 			       ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
 			       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
@@ -718,7 +717,7 @@  static bool renesas_sdhi_manual_correction(struct tmio_mmc_host *host, bool use_
 	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0);
 
 	/* Change TAP position according to correction status */
-	if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC &&
+	if (priv->quirks && priv->quirks->manual_tap_correction &&
 	    host->mmc->ios.timing == MMC_TIMING_MMC_HS400) {
 		u32 bad_taps = priv->quirks ? priv->quirks->hs400_bad_taps : 0;
 		/*
diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
index 0ccdbe3010ee..42937596c4c4 100644
--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
@@ -170,6 +170,7 @@  static const struct renesas_sdhi_quirks sdhi_quirks_4tap_nohs400_one_rx = {
 static const struct renesas_sdhi_quirks sdhi_quirks_4tap = {
 	.hs400_4taps = true,
 	.hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
+	.manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_nohs400 = {
@@ -182,25 +183,30 @@  static const struct renesas_sdhi_quirks sdhi_quirks_fixed_addr = {
 
 static const struct renesas_sdhi_quirks sdhi_quirks_bad_taps1357 = {
 	.hs400_bad_taps = BIT(1) | BIT(3) | BIT(5) | BIT(7),
+	.manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_bad_taps2367 = {
 	.hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
+	.manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es13 = {
 	.hs400_4taps = true,
 	.hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
 	.hs400_calib_table = r8a7796_es13_calib_table,
+	.manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_r8a77965 = {
 	.hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
 	.hs400_calib_table = r8a77965_calib_table,
+	.manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_r8a77990 = {
 	.hs400_calib_table = r8a77990_calib_table,
+	.manual_tap_correction = true,
 };
 
 /*