diff mbox series

[RFC,V2,12/12] arm64: tegra: SDHCI timing settings

Message ID 20240701151231.29425-13-kyarlagadda@nvidia.com (mailing list archive)
State New
Headers show
Series Introduce Tegra register config settings | expand

Commit Message

Krishna Yarlagadda July 1, 2024, 3:12 p.m. UTC 
Set SDHCI timing registers through config settings for
Tegra234 chip and P3701 board.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi | 36 ++++++++++++++++++++
 1 file changed, 36 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
index 7e5b9c10c617..30c125636123 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
@@ -426,6 +426,34 @@  i2c-standard-cfg {
 
 		};
 
+		configmmc1: config-mmc3400000 {
+
+			sdhci-mmc-hs200-cfg {
+				nvidia,num-tuning-iter = <0x2>;
+			};
+
+			sdhci-uhs-sdr104-cfg {
+				nvidia,num-tuning-iter = <0x2>;
+			};
+
+			sdhci-uhs-sdr50-cfg {
+				nvidia,num-tuning-iter = <0x4>;
+			};
+
+		};
+
+		configmmc2: config-mmc3460000 {
+
+			sdhci-mmc-hs200-cfg {
+				nvidia,num-tuning-iter = <0x2>;
+			};
+
+			sdhci-mmc-hs400-cfg {
+				nvidia,num-tuning-iter = <0x2>;
+			};
+
+		};
+
 	};
 
 	bus@0 {
@@ -461,5 +489,13 @@  i2c@c250000 {
 			config-settings = <&configi2c8>;
 		};
 
+		mmc@3400000 {
+			config-settings = <&configmmc1>;
+		};
+
+		mmc@3460000 {
+			config-settings = <&configmmc2>;
+		};
+
 	};
 };