Message ID | 20250326143945.82142-5-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Add support for Renesas RZ/V2N SoC and EVK | expand |
On Wed, 26 Mar 2025 14:39:34 +0000, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add the RZ/V2N (R9A09G056) variant to the existing RZ/V2H(P) System > Controller (SYS) binding, as both IPs are very similar. > > However, they have different SoC IDs, and the RZ/V2N does not have > PCIE1 configuration registers, unlike the RZ/V2H(P) SYS IP. To handle > these differences, introduce a new compatible string > `renesas,r9a09g056-sys`. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > .../devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring (Arm) <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml index e0f7503a9f35..c41dcaea568a 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml @@ -25,6 +25,7 @@ properties: items: - enum: - renesas,r9a09g047-sys # RZ/G3E + - renesas,r9a09g056-sys # RZ/V2N - renesas,r9a09g057-sys # RZ/V2H reg: