From patchwork Sat Feb 18 13:22:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiner Kallweit X-Patchwork-Id: 9581095 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C5ABF604A4 for ; Sat, 18 Feb 2017 13:27:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B451B28236 for ; Sat, 18 Feb 2017 13:27:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A8ED52841C; Sat, 18 Feb 2017 13:27:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 554B428236 for ; Sat, 18 Feb 2017 13:27:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753245AbdBRN1V (ORCPT ); Sat, 18 Feb 2017 08:27:21 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:36772 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753015AbdBRN1O (ORCPT ); Sat, 18 Feb 2017 08:27:14 -0500 Received: by mail-wm0-f65.google.com with SMTP id r18so6864288wmd.3 for ; Sat, 18 Feb 2017 05:26:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:references:cc:from:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding; bh=2uaKGq9bXNCaN1M44ny0rcfu0zIj7KK6DAkjMgA+KMY=; b=TZjYtx0SK6+KlYc+8ObmqGqTwVr1QgLiw20fKyGlfh/lOEDOIFM82YhiW2iLS8CUmm tdIuAZYz+0XcYO6jasVWSDTVLVnFGorObnTMTHjEofgNEYUS0zs0fEQiItMlCxM8y/FD NTjimjbvqx4HkhpEgELg6PctIJv6Gal2lLzy3PzwGBFGmZRsm1Filu7Gtcnwb8UHSep9 Cg//inGnv8kamEgL6/s2mzo07CLwNLi8Pgn/73/2HRbsYaa/kL+FXn9KmtaLPJwhZPd4 Mf/QzP2bZ5LW/w9IdMpFQjsDnl1V748ZuBGgsKzcNrrNgh6yYpeqWQP9z3EmR0k3V1lL BNmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:references:cc:from:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding; bh=2uaKGq9bXNCaN1M44ny0rcfu0zIj7KK6DAkjMgA+KMY=; b=B+lLTSAfNeEkISiqTl2OAzFbZEijnKE671+OR8WV0L1k7Yy9IM2XQeQRK5/gIN0pve xAN4a0mvd6HaIfmzYb7jLdswRjMNNCGGGHZAN8of2DZfKycci90GLoPpQkE2OEvCgZGb wgLqms78Sg/045BOki9SnyTb4Nar4R894hiWgp8nQ8mhd8XME+4N/Osj+z+0E/P86GM5 qtEVsvUuM9BwuplvY8pATO9QbsDU3eNJLyt3MVUAisce4VMjYm6U8WsbCr3U8B1iWbOT B1ddZqXfjc3s/lAizLBI+Bszq+/4Y0yklTHZysMAkz75Kirp0DmWM3GIGmvywrbDyF1S MUSw== X-Gm-Message-State: AMke39lldl2DEY+qjMyZWIOjY45eRH/WN2XlYtWENdjxqG8F1pc1jCuB7/aC+mAaw/Qryg== X-Received: by 10.28.180.132 with SMTP id d126mr9285046wmf.123.1487424401985; Sat, 18 Feb 2017 05:26:41 -0800 (PST) Received: from ?IPv6:2003:c6:ebdc:4000:7c19:f774:dabe:f95d? (p200300C6EBDC40007C19F774DABEF95D.dip0.t-ipconnect.de. [2003:c6:ebdc:4000:7c19:f774:dabe:f95d]) by smtp.googlemail.com with ESMTPSA id u189sm5671355wmu.1.2017.02.18.05.26.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 18 Feb 2017 05:26:41 -0800 (PST) Subject: [PATCH v3 8/10] mmc: meson-gx: improve initial configuration To: Ulf Hansson , Kevin Hilman References: <583f6496-68a9-b8e1-6b25-1f073f819a3c@gmail.com> Cc: "linux-mmc@vger.kernel.org" , linux-amlogic@lists.infradead.org From: Heiner Kallweit Message-ID: <28e5119c-3779-4393-8bfb-38254c0761e0@gmail.com> Date: Sat, 18 Feb 2017 14:22:27 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: <583f6496-68a9-b8e1-6b25-1f073f819a3c@gmail.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Config values which are not changed during runtime we can set in the probe function already. The block size setting is overwritten later in meson_mmc_start_cmd anyway if needed, so it doesn't harm if we remove this setting in meson_mmc_set_ios. In addition: - write config register only if configuration changed - Initialize clocks after other config registers have been initialized Signed-off-by: Heiner Kallweit Acked-by: Kevin Hilman --- v2: - added acked-by v3: - rebased --- drivers/mmc/host/meson-gx-mmc.c | 37 +++++++++++++++++++++---------------- 1 file changed, 21 insertions(+), 16 deletions(-) diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 684cc088..e904b0a5 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -394,15 +394,6 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) val &= ~(CFG_BUS_WIDTH_MASK << CFG_BUS_WIDTH_SHIFT); val |= bus_width << CFG_BUS_WIDTH_SHIFT; - val &= ~(CFG_BLK_LEN_MASK << CFG_BLK_LEN_SHIFT); - val |= ilog2(SD_EMMC_CFG_BLK_SIZE) << CFG_BLK_LEN_SHIFT; - - val &= ~(CFG_RESP_TIMEOUT_MASK << CFG_RESP_TIMEOUT_SHIFT); - val |= ilog2(SD_EMMC_CFG_RESP_TIMEOUT) << CFG_RESP_TIMEOUT_SHIFT; - - val &= ~(CFG_RC_CC_MASK << CFG_RC_CC_SHIFT); - val |= ilog2(SD_EMMC_CFG_CMD_GAP) << CFG_RC_CC_SHIFT; - val &= ~CFG_DDR; if (ios->timing == MMC_TIMING_UHS_DDR50 || ios->timing == MMC_TIMING_MMC_DDR52 || @@ -413,11 +404,11 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (ios->timing == MMC_TIMING_MMC_HS400) val |= CFG_CHK_DS; - writel(val, host->regs + SD_EMMC_CFG); - - if (val != orig) + if (val != orig) { + writel(val, host->regs + SD_EMMC_CFG); dev_dbg(host->dev, "%s: SD_EMMC_CFG: 0x%08x -> 0x%08x\n", __func__, orig, val); + } } static void meson_mmc_request_done(struct mmc_host *mmc, @@ -695,6 +686,17 @@ static int meson_mmc_get_cd(struct mmc_host *mmc) return status; } +static void meson_mmc_cfg_init(struct meson_host *host) +{ + u32 cfg = 0; + + cfg |= ilog2(SD_EMMC_CFG_RESP_TIMEOUT) << CFG_RESP_TIMEOUT_SHIFT; + cfg |= ilog2(SD_EMMC_CFG_CMD_GAP) << CFG_RC_CC_SHIFT; + cfg |= ilog2(SD_EMMC_CFG_BLK_SIZE) << CFG_BLK_LEN_SHIFT; + + writel(cfg, host->regs + SD_EMMC_CFG); +} + static const struct mmc_host_ops meson_mmc_ops = { .request = meson_mmc_request, .set_ios = meson_mmc_set_ios, @@ -755,10 +757,6 @@ static int meson_mmc_probe(struct platform_device *pdev) if (ret) goto free_host; - ret = meson_mmc_clk_init(host); - if (ret) - goto free_host; - /* Stop execution */ writel(0, host->regs + SD_EMMC_START); @@ -767,6 +765,13 @@ static int meson_mmc_probe(struct platform_device *pdev) writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS); writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN); + /* set config to sane default */ + meson_mmc_cfg_init(host); + + ret = meson_mmc_clk_init(host); + if (ret) + goto free_host; + ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq, meson_mmc_irq_thread, IRQF_SHARED, DRIVER_NAME, host);