From patchwork Fri Apr 22 20:14:35 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Rakity X-Patchwork-Id: 727931 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p3MKEhhQ031359 for ; Fri, 22 Apr 2011 20:14:43 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755448Ab1DVUOm (ORCPT ); Fri, 22 Apr 2011 16:14:42 -0400 Received: from na3sys009aog104.obsmtp.com ([74.125.149.73]:57419 "EHLO na3sys009aog104.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755181Ab1DVUOm convert rfc822-to-8bit (ORCPT ); Fri, 22 Apr 2011 16:14:42 -0400 Received: from SC-OWA01.marvell.com ([65.219.4.129]) (using TLSv1) by na3sys009aob104.postini.com ([74.125.148.12]) with SMTP ID DSNKTbHhsGQIzZmyRbHSmn0CsvojAoh1DO6v@postini.com; Fri, 22 Apr 2011 13:14:42 PDT Received: from SC-vEXCH3.marvell.com ([10.93.76.133]) by SC-OWA01.marvell.com ([10.93.76.21]) with mapi; Fri, 22 Apr 2011 13:12:04 -0700 From: Philip Rakity To: "linux-mmc@vger.kernel.org" CC: Zhangfei Gao Date: Fri, 22 Apr 2011 13:14:35 -0700 Subject: [PATCH] sdhci: sdhci-pxa.c: delete clk gating code - not correct Thread-Topic: [PATCH] sdhci: sdhci-pxa.c: delete clk gating code - not correct Thread-Index: AcwBKedmaXfW+hO/Sv+MW6C0/0zA1A== Message-ID: <29407489-F5C8-4629-831F-5D41706C7850@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 22 Apr 2011 20:14:45 +0000 (UTC) clock gating is using wrong registers for mmp2 SoC sdhc-pxa.c is not generic for pxa family. remove code -- future patch will add back support Signed-off-by: Philip Rakity Signed-off-by: Mark F. Brown --- arch/arm/plat-pxa/include/plat/sdhci.h | 1 - drivers/mmc/host/sdhci-pxa.c | 9 --------- 2 files changed, 0 insertions(+), 10 deletions(-) diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h index dd1ce96..b3e4d19 100644 --- a/arch/arm/plat-pxa/include/plat/sdhci.h +++ b/arch/arm/plat-pxa/include/plat/sdhci.h @@ -15,7 +15,6 @@ /* pxa specific flag */ /* Require clock free running */ -#define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) /* Board design supports 8-bit data on SD/SDIO BUS */ #define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2) diff --git a/drivers/mmc/host/sdhci-pxa.c b/drivers/mmc/host/sdhci-pxa.c index 5a61208..4713238 100644 --- a/drivers/mmc/host/sdhci-pxa.c +++ b/drivers/mmc/host/sdhci-pxa.c @@ -29,9 +29,6 @@ #define DRIVER_NAME "sdhci-pxa" -#define SD_FIFO_PARAM 0x104 -#define DIS_PAD_SD_CLK_GATE 0x400 - struct sdhci_pxa { struct sdhci_host *host; struct sdhci_pxa_platdata *pdata; @@ -49,7 +46,6 @@ struct sdhci_pxa { static void set_clock(struct sdhci_host *host, unsigned int clock) { struct sdhci_pxa *pxa = sdhci_priv(host); - u32 tmp = 0; if (clock == 0) { if (pxa->clk_enable) { @@ -58,11 +54,6 @@ static void set_clock(struct sdhci_host *host, unsigned int clock) } } else { if (0 == pxa->clk_enable) { - if (pxa->pdata->flags & PXA_FLAG_DISABLE_CLOCK_GATING) { - tmp = readl(host->ioaddr + SD_FIFO_PARAM); - tmp |= DIS_PAD_SD_CLK_GATE; - writel(tmp, host->ioaddr + SD_FIFO_PARAM); - } clk_enable(pxa->clk); pxa->clk_enable = 1; }