From patchwork Mon Feb 14 07:08:51 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Rakity X-Patchwork-Id: 554151 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1E7Ad6V014734 for ; Mon, 14 Feb 2011 07:10:39 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751865Ab1BNHKh (ORCPT ); Mon, 14 Feb 2011 02:10:37 -0500 Received: from na3sys009aog110.obsmtp.com ([74.125.149.203]:38487 "EHLO na3sys009aog110.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751707Ab1BNHKh convert rfc822-to-8bit (ORCPT ); Mon, 14 Feb 2011 02:10:37 -0500 Received: from source ([65.219.4.130]) (using TLSv1) by na3sys009aob110.postini.com ([74.125.148.12]) with SMTP ID DSNKTVjVbY4NiYSVWfpReujCm4abRPw9BTh1@postini.com; Sun, 13 Feb 2011 23:10:37 PST Received: from SC-vEXCH3.marvell.com ([10.93.76.133]) by sc-owa02.marvell.com ([10.93.76.22]) with mapi; Sun, 13 Feb 2011 23:08:54 -0800 From: Philip Rakity To: "linux-mmc@vger.kernel.org" CC: Mark Brown Date: Sun, 13 Feb 2011 23:08:51 -0800 Subject: [PATCH 1/2] sdhci: sdhci.c: Add pre / post reset processing for chip specific reset Thread-Topic: [PATCH 1/2] sdhci: sdhci.c: Add pre / post reset processing for chip specific reset Thread-Index: AcvMFgmVLHtZ1F7WQqG4NUThbbKFtg== Message-ID: <34AA1352-6C6B-400C-8883-9D9EC2E655D5@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 14 Feb 2011 07:10:53 +0000 (UTC) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 1a88303..7207b57 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -158,6 +158,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) ier = sdhci_readl(host, SDHCI_INT_ENABLE); + if (host->ops->platform_reset_enter) + host->ops->platform_reset_enter(host, mask); + sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); if (mask & SDHCI_RESET_ALL) @@ -178,6 +181,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) mdelay(1); } + if (host->ops->platform_reset_exit) + host->ops->platform_reset_exit(host, mask); + if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 1f032c0..4f62505 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -222,6 +222,8 @@ struct sdhci_ops { void (*platform_send_init_74_clocks)(struct sdhci_host *host, u8 power_mode); unsigned int (*get_ro)(struct sdhci_host *host); + void (*platform_reset_enter)(struct sdhci_host *host, u8 mask); + void (*platform_reset_exit)(struct sdhci_host *host, u8 mask); }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS