From patchwork Tue Jun 18 03:15:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Shimoda X-Patchwork-Id: 2738261 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9ABD2C0AB1 for ; Tue, 18 Jun 2013 03:15:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A80D620283 for ; Tue, 18 Jun 2013 03:15:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B08B320276 for ; Tue, 18 Jun 2013 03:15:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753895Ab3FRDPP (ORCPT ); Mon, 17 Jun 2013 23:15:15 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:41954 "EHLO relmlor3.renesas.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752247Ab3FRDPP (ORCPT ); Mon, 17 Jun 2013 23:15:15 -0400 Received: from relmlir3.idc.renesas.com ([10.200.68.153]) by relmlor3.idc.renesas.com ( SJSMS) with ESMTP id <0MOK002RUJPDJZ10@relmlor3.idc.renesas.com>; Tue, 18 Jun 2013 12:15:13 +0900 (JST) Received: from relmlac1.idc.renesas.com ([10.200.69.21]) by relmlir3.idc.renesas.com ( SJSMS) with ESMTP id <0MOK0023NJPC1A70@relmlir3.idc.renesas.com>; Tue, 18 Jun 2013 12:15:13 +0900 (JST) Received: by relmlac1.idc.renesas.com (Postfix, from userid 0) id F060E80179; Tue, 18 Jun 2013 12:15:12 +0900 (JST) Received: from relmlac1.idc.renesas.com (localhost [127.0.0.1]) by relmlac1.idc.renesas.com (Postfix) with ESMTP id EB65E80177; Tue, 18 Jun 2013 12:15:12 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac1.idc.renesas.com with ESMTP id NAH06089; Tue, 18 Jun 2013 12:15:12 +0900 X-IronPort-AV: E=Sophos; i="4.87,885,1363100400"; d="scan'208"; a="131052120" Received: from unknown (HELO [10.161.41.141]) ([10.161.41.141]) by relmlii2.idc.renesas.com with ESMTP; Tue, 18 Jun 2013 12:15:12 +0900 Message-id: <51BFD0C0.4080908@renesas.com> Date: Tue, 18 Jun 2013 12:15:12 +0900 From: "Shimoda, Yoshihiro" User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:17.0) Gecko/20130509 Thunderbird/17.0.6 MIME-version: 1.0 To: cjb@laptop.org Cc: linux-mmc@vger.kernel.org, SH-Linux , Guennadi Liakhovetski Subject: [PATCH v2] mmc: sh_mmcif: add SET_BLOCK_COUNT support Content-type: text/plain; charset=ISO-8859-1 Content-transfer-encoding: 7bit Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds SET_BLOCK_COUNT(CMD23) support to sh_mmcif driver. If we add MMC_CAP_CMD23 to ".caps" of sh_mmcif_plat_data, the mmc core driver will use CMD23. Then, the sh_mmcif driver can use Reliable Write feature. Signed-off-by: Yoshihiro Shimoda --- about v2: - remove the wait_for_completion() to process the .request() asynchronously. drivers/mmc/host/sh_mmcif.c | 64 +++++++++++++++++++++++++++++++++++++++--- 1 files changed, 59 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 8ef5efa..8f66532 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c @@ -223,7 +223,8 @@ enum mmcif_wait_for { struct sh_mmcif_host { struct mmc_host *mmc; - struct mmc_request *mrq; + struct mmc_request *mrq; /* current mmc_request pointer */ + struct mmc_request *mrq_orig; /* original .request()'s pointer */ struct platform_device *pd; struct clk *hclk; unsigned int clk; @@ -244,6 +245,7 @@ struct sh_mmcif_host { bool power; bool card_present; struct mutex thread_lock; + struct mmc_request mrq_sbc; /* mmc_request for SBC */ /* DMA support */ struct dma_chan *chan_rx; @@ -802,7 +804,11 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host, tmp |= CMD_SET_DWEN; /* CMLTE/CMD12EN */ if (opc == MMC_READ_MULTIPLE_BLOCK || opc == MMC_WRITE_MULTIPLE_BLOCK) { - tmp |= CMD_SET_CMLTE | CMD_SET_CMD12EN; + /* If SBC, we don't use CMD12(STOP) */ + if (mrq->sbc) + tmp |= CMD_SET_CMLTE; + else + tmp |= CMD_SET_CMLTE | CMD_SET_CMD12EN; sh_mmcif_bitset(host, MMCIF_CE_BLOCK_SET, data->blocks << 16); } @@ -936,9 +942,27 @@ static void sh_mmcif_request(struct mmc_host *mmc, struct mmc_request *mrq) break; } - host->mrq = mrq; + if (mrq->sbc) { + /* Store original mrq to mrq_orig */ + host->mrq_orig = mrq; + + /* Copy original mrq data to mrq_sbc */ + host->mrq_sbc = *mrq; - sh_mmcif_start_cmd(host, mrq); + /* Switch the mrq_sbc.cmd for SBC */ + host->mrq_sbc.cmd = mrq->sbc; + host->mrq_sbc.sbc = NULL; + host->mrq_sbc.data = NULL; + host->mrq_sbc.stop = NULL; + + /* Set current mrq pointer to mrq_sbc */ + host->mrq = &host->mrq_sbc; + } else { + /* Set current mrq pointer to original mrq */ + host->mrq = mrq; + } + + sh_mmcif_start_cmd(host, host->mrq); } static int sh_mmcif_clk_update(struct sh_mmcif_host *host) @@ -1212,13 +1236,35 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id) return IRQ_HANDLED; } + if (mrq->sbc && (mrq->cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK) && + (host->wait_for != MMCIF_WAIT_FOR_WRITE_END)) { + /* Wait for end of data phase */ + host->wait_for = MMCIF_WAIT_FOR_WRITE_END; + sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MDTRANE); + schedule_delayed_work(&host->timeout_work, host->timeout); + mutex_unlock(&host->thread_lock); + return IRQ_HANDLED; + } + + if (mrq->sbc && (mrq->cmd->opcode == MMC_READ_MULTIPLE_BLOCK) && + (host->wait_for != MMCIF_WAIT_FOR_READ_END)) { + /* Wait for end of data phase */ + host->wait_for = MMCIF_WAIT_FOR_READ_END; + sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFRE); + schedule_delayed_work(&host->timeout_work, host->timeout); + mutex_unlock(&host->thread_lock); + return IRQ_HANDLED; + } + if (host->wait_for != MMCIF_WAIT_FOR_STOP) { struct mmc_data *data = mrq->data; if (!mrq->cmd->error && data && !data->error) data->bytes_xfered = data->blocks * data->blksz; - if (mrq->stop && !mrq->cmd->error && (!data || !data->error)) { + /* If SBC, we don't use CMD12(STOP) */ + if (mrq->stop && !mrq->cmd->error && (!data || !data->error) && + !mrq->sbc) { sh_mmcif_stop_cmd(host, mrq); if (!mrq->stop->error) { schedule_delayed_work(&host->timeout_work, host->timeout); @@ -1228,6 +1274,14 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id) } } + if ((mrq->cmd->opcode == MMC_SET_BLOCK_COUNT) && !mrq->cmd->error) { + /* Send the original .request() command */ + host->mrq = host->mrq_orig; + sh_mmcif_start_cmd(host, host->mrq); + mutex_unlock(&host->thread_lock); + return IRQ_HANDLED; + } + host->wait_for = MMCIF_WAIT_FOR_REQUEST; host->state = STATE_IDLE; host->mrq = NULL;