From patchwork Wed Jan 20 08:26:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaehoon Chung X-Patchwork-Id: 8069721 Return-Path: X-Original-To: patchwork-linux-mmc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 655C59F440 for ; Wed, 20 Jan 2016 08:26:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 30355203DC for ; Wed, 20 Jan 2016 08:26:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9F6EA2026F for ; Wed, 20 Jan 2016 08:26:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757279AbcATI0p (ORCPT ); Wed, 20 Jan 2016 03:26:45 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:60637 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751785AbcATI0o (ORCPT ); Wed, 20 Jan 2016 03:26:44 -0500 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O1802YUASSIFDD0@mailout4.samsung.com>; Wed, 20 Jan 2016 17:26:42 +0900 (KST) Received: from epcpsbgm2new.samsung.com ( [172.20.52.112]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 2C.D0.04790.2C44F965; Wed, 20 Jan 2016 17:26:42 +0900 (KST) X-AuditID: cbfee691-f79766d0000012b6-ae-569f44c2e29a Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id 02.01.09068.1C44F965; Wed, 20 Jan 2016 17:26:42 +0900 (KST) Received: from [10.113.62.216] by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O18001ESSSHJJ00@mmp2.samsung.com>; Wed, 20 Jan 2016 17:26:41 +0900 (KST) Message-id: <569F44BC.4010205@samsung.com> Date: Wed, 20 Jan 2016 17:26:36 +0900 From: Jaehoon Chung User-Agent: Mozilla/5.0 (X11; Linux i686; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-version: 1.0 To: Shawn Lin , Ulf Hansson Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/3] Convert dw_mci_pltfm_prepare_command into a library call References: <1453174787-13536-1-git-send-email-shawn.lin@rock-chips.com> In-reply-to: <1453174787-13536-1-git-send-email-shawn.lin@rock-chips.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpjkeLIzCtJLcpLzFFi42JZI2JSoHvIZX6YQftSTovLu+awWRz5389o cefJelaL42vDHVg87lzbw+bxd9Z+Fo/Pm+QCmKO4bFJSczLLUov07RK4Mp4fiyw4ZlOx/+cW 5gbGpUZdjJwcEgImEp3Nq9ggbDGJC/fWg9lCAisYJaa3KcPU3F2znbWLkQsoPotRYt7Kc2wQ zgOgota7TCBVvAJaEq8X94DZLAKqEieWdYDZbAI6Etu/HQezRQXCJB6s28sKUS8o8WPyPRYQ W0TAT2Lrjq1gm5kFrCV+/mgFqxEWCJY4tfs11EUeEncnX2AHsTkFPCX2HP8B1MsBVK8ncf+i FkSrvMTmNW+ZQW6TEFjFLrF4+31miHsEJL5NPgRWLyEgK7HpADPEY5ISB1fcYJnAKDYLyUWz EKbOQjJ1ASPzKkbR1ILkguKk9CJTveLE3OLSvHS95PzcTYzA6Dn979nEHYz3D1gfYhTgYFTi 4Y1onRcmxJpYVlyZe4jRFOiIicxSosn5wBjNK4k3NDYzsjA1MTU2Mrc0UxLn1ZH+GSwkkJ5Y kpqdmlqQWhRfVJqTWnyIkYmDU6qB8dBm7kkM8/R9d8hfebtFV/CK4JGnLAa6871vtxXOXnqp qLRHOVvp9pTX/5/732V6/vRxc/j8G81Fhu/aZzYKT3qf+qLlZ87f6cdKXfZYHNDVM+RbcDSs TP5Z11G3eVtbNA8cdf9dMsW8UXhb2k3Zyj12nH8W/vpuk3q3tmepZ0D8g08v1i36+UCJpTgj 0VCLuag4EQDpiMmZmQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrCIsWRmVeSWpSXmKPExsVy+t9jQd1DLvPDDI4uYra4vGsOm8WR//2M FneerGe1OL423IHF4861PWwef2ftZ/H4vEkugDmqgdEmIzUxJbVIITUvOT8lMy/dVsk7ON45 3tTMwFDX0NLCXEkhLzE31VbJxSdA1y0zB2ibkkJZYk4pUCggsbhYSd8O04TQEDddC5jGCF3f kCC4HiMDNJCwhjHj+bHIgmM2Fft/bmFuYFxq1MXIySEhYCJxd812VghbTOLCvfVsXYxcHEIC sxgl5q08B+U8YJSY3nqXCaSKV0BL4vXiHjCbRUBV4sSyDjCbTUBHYvu342C2qECYxIN1e1kh 6gUlfky+xwJiiwj4SWzdsZUNxGYWsJb4+aMVrEZYIFji1O7XYHEhAQ+Ju5MvsIPYnAKeEnuO /wDq5QCq15O4f1ELolVeYvOat8wTGIGuRNgwC6FqFpKqBYzMqxglUguSC4qT0nON8lLL9YoT c4tL89L1kvNzNzGCY/SZ9A7Gw7vcDzEKcDAq8fBGtM4LE2JNLCuuzD3EKMHBrCTCm6I/P0yI NyWxsiq1KD++qDQntfgQoykwCCYyS4km5wPTR15JvKGxiZmRpZG5oYWRsbmSOO++S5FhQgLp iSWp2ampBalFMH1MHJxSDYxGS/7UxInnPFFd5v3WpjyFbTtf+a5H1dvr2ZdumfHu/e0jG/7s C5ouGHbQ4sYsn3dLGM3ty/zmdV2cf/qIhs/Bl5LGnqmmPsc5VjwM32NcOP1b24HcC2yWalmi 3kXPHuRV72CVWrPeb+tTzqy2o9xvJ7JeU5tzRrf1nfiTm5913Grml8unX5dXYinOSDTUYi4q TgQAh18e6ecCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Shawn. On 01/19/2016 12:39 PM, Shawn Lin wrote: > This patchset expose dw_mci_pltfm_prepare_command towards to > library call and remove the redundant code from dw_mmc-rockchip. > Meanwhile we make dw_mmc-exynos to call it instead of changing cmdr > in its variant drivers. > Actually, I want to remove *_prepare_command from entire dw-mmc driver. Since exynos used USE_HOLD_REG bit in case of special condition, maybe you doesn't remove all, right? I'm figuring out the using the generic solution. Before that, how about this? I want to know your opinion. > > > Shawn Lin (3): > mmc: dw_mmc: expose dw_mci_pltfm_prepare_command > mmc: dw_mmc-rockchip: remove prepare_command hook > mmc: dw_mmc-exynos: wrapper prepare_command > > drivers/mmc/host/dw_mmc-exynos.c | 4 ++-- > drivers/mmc/host/dw_mmc-pltfm.c | 3 ++- > drivers/mmc/host/dw_mmc-pltfm.h | 2 +- > drivers/mmc/host/dw_mmc-rockchip.c | 9 ++------- > 4 files changed, 7 insertions(+), 11 deletions(-) > --- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 3a7e835..ed08e4b 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -145,6 +145,16 @@ static void dw_mci_exynos_set_clksel_timing(struct dw_mci *host, u32 timing) mci_writel(host, CLKSEL64, clksel); else mci_writel(host, CLKSEL, clksel); + + /* + * Exynos4412 and Exynos5250 extends the use of CMD register with the + * use of bit 29 (which is reserved on standard MSHC controllers) for + * optionally bypassing the HOLD register for command and data. The + * HOLD register should be bypassed in case there is no phase shift + * applied on CMD/DATA that is sent to the card. + */ + if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel)) + host->no_use_hold = 1; } #ifdef CONFIG_PM_SLEEP @@ -202,26 +212,6 @@ static int dw_mci_exynos_resume_noirq(struct device *dev) #define dw_mci_exynos_resume_noirq NULL #endif /* CONFIG_PM_SLEEP */ -static void dw_mci_exynos_prepare_command(struct dw_mci *host, u32 *cmdr) -{ - struct dw_mci_exynos_priv_data *priv = host->priv; - /* - * Exynos4412 and Exynos5250 extends the use of CMD register with the - * use of bit 29 (which is reserved on standard MSHC controllers) for - * optionally bypassing the HOLD register for command and data. The - * HOLD register should be bypassed in case there is no phase shift - * applied on CMD/DATA that is sent to the card. - */ - if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || - priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) { - if (SDMMC_CLKSEL_GET_DRV_WD3(mci_readl(host, CLKSEL64))) - *cmdr |= SDMMC_CMD_USE_HOLD_REG; - } else { - if (SDMMC_CLKSEL_GET_DRV_WD3(mci_readl(host, CLKSEL))) - *cmdr |= SDMMC_CMD_USE_HOLD_REG; - } -} - static void dw_mci_exynos_config_hs400(struct dw_mci *host, u32 timing) { struct dw_mci_exynos_priv_data *priv = host->priv; @@ -500,7 +490,6 @@ static const struct dw_mci_drv_data exynos_drv_data = { .caps = exynos_dwmmc_caps, .init = dw_mci_exynos_priv_init, .setup_clock = dw_mci_exynos_setup_clock, - .prepare_command = dw_mci_exynos_prepare_command, .set_ios = dw_mci_exynos_set_ios, .parse_dt = dw_mci_exynos_parse_dt, .execute_tuning = dw_mci_exynos_execute_tuning, diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index 81bdeeb..c0bb0c7 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c @@ -26,19 +26,6 @@ #include "dw_mmc.h" #include "dw_mmc-pltfm.h" -static void dw_mci_pltfm_prepare_command(struct dw_mci *host, u32 *cmdr) -{ - *cmdr |= SDMMC_CMD_USE_HOLD_REG; -} - -static const struct dw_mci_drv_data socfpga_drv_data = { - .prepare_command = dw_mci_pltfm_prepare_command, -}; - -static const struct dw_mci_drv_data pistachio_drv_data = { - .prepare_command = dw_mci_pltfm_prepare_command, -}; - int dw_mci_pltfm_register(struct platform_device *pdev, const struct dw_mci_drv_data *drv_data) { @@ -94,10 +81,8 @@ EXPORT_SYMBOL_GPL(dw_mci_pltfm_pmops); static const struct of_device_id dw_mci_pltfm_match[] = { { .compatible = "snps,dw-mshc", }, - { .compatible = "altr,socfpga-dw-mshc", - .data = &socfpga_drv_data }, - { .compatible = "img,pistachio-dw-mshc", - .data = &pistachio_drv_data }, + { .compatible = "altr,socfpga-dw-mshc", }, + { .compatible = "img,pistachio-dw-mshc", }, {}, }; MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match); diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index d9c92f3..84e50f3 100644 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -26,11 +26,6 @@ struct dw_mci_rockchip_priv_data { int default_sample_phase; }; -static void dw_mci_rockchip_prepare_command(struct dw_mci *host, u32 *cmdr) -{ - *cmdr |= SDMMC_CMD_USE_HOLD_REG; -} - static int dw_mci_rk3288_setup_clock(struct dw_mci *host) { host->bus_hz /= RK3288_CLKGEN_DIV; @@ -240,12 +235,10 @@ static int dw_mci_rockchip_init(struct dw_mci *host) } static const struct dw_mci_drv_data rk2928_drv_data = { - .prepare_command = dw_mci_rockchip_prepare_command, .init = dw_mci_rockchip_init, }; static const struct dw_mci_drv_data rk3288_drv_data = { - .prepare_command = dw_mci_rockchip_prepare_command, .set_ios = dw_mci_rk3288_set_ios, .execute_tuning = dw_mci_rk3288_execute_tuning, .parse_dt = dw_mci_rk3288_parse_dt, diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index ffef24a..844f8cf 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -234,7 +234,6 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) struct mmc_data *data; struct dw_mci_slot *slot = mmc_priv(mmc); struct dw_mci *host = slot->host; - const struct dw_mci_drv_data *drv_data = slot->host->drv_data; u32 cmdr; cmd->error = -EINPROGRESS; @@ -296,8 +295,8 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) cmdr |= SDMMC_CMD_DAT_WR; } - if (drv_data && drv_data->prepare_command) - drv_data->prepare_command(slot->host, &cmdr); + if (!host->no_use_hold) + cmdr |= SDMMC_CMD_USE_HOLD_REG; return cmdr; } diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index a14b7fc..c0fc0e3 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -277,7 +277,6 @@ struct dw_mci_slot { * @caps: mmc subsystem specified capabilities of the controller(s). * @init: early implementation specific initialization. * @setup_clock: implementation specific clock configuration. - * @prepare_command: handle CMD register extensions. * @set_ios: handle bus specific extensions. * @parse_dt: parse implementation specific device tree properties. * @execute_tuning: implementation specific tuning procedure. @@ -290,7 +289,6 @@ struct dw_mci_drv_data { unsigned long *caps; int (*init)(struct dw_mci *host); int (*setup_clock)(struct dw_mci *host); - void (*prepare_command)(struct dw_mci *host, u32 *cmdr); void (*set_ios)(struct dw_mci *host, struct mmc_ios *ios); int (*parse_dt)(struct dw_mci *host); int (*execute_tuning)(struct dw_mci_slot *slot, u32 opcode); diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h index 89df7ab..7b1416a 100644 --- a/include/linux/mmc/dw_mmc.h +++ b/include/linux/mmc/dw_mmc.h @@ -221,6 +221,8 @@ struct dw_mci { struct timer_list cmd11_timer; struct timer_list dto_timer; + + int no_use_hold; }; /* DMA ops for Internal/External DMAC interface */