From patchwork Fri Jan 21 19:22:04 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Rakity X-Patchwork-Id: 496181 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p0LJOOH5003667 for ; Fri, 21 Jan 2011 19:24:50 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753971Ab1AUTYu (ORCPT ); Fri, 21 Jan 2011 14:24:50 -0500 Received: from na3sys009aog113.obsmtp.com ([74.125.149.209]:38821 "HELO na3sys009aog113.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1754788Ab1AUTYt convert rfc822-to-8bit (ORCPT ); Fri, 21 Jan 2011 14:24:49 -0500 Received: from source ([65.219.4.129]) (using TLSv1) by na3sys009aob113.postini.com ([74.125.148.12]) with SMTP ID DSNKTTndgf/rEGb7Sk9UNQI0Hui2qY4BT+Mn@postini.com; Fri, 21 Jan 2011 11:24:49 PST Received: from SC-vEXCH3.marvell.com ([10.93.76.133]) by SC-OWA01.marvell.com ([10.93.76.21]) with mapi; Fri, 21 Jan 2011 11:22:05 -0800 From: Philip Rakity To: "linux-mmc@vger.kernel.org" CC: Mark Brown Date: Fri, 21 Jan 2011 11:22:04 -0800 Subject: [PATCH] sdhci: delete clk gating code and FLAG since not correct Thread-Topic: [PATCH] sdhci: delete clk gating code and FLAG since not correct Thread-Index: Acu5oH0PU6o2ow4ORhq8PdiOI2d4hQ== Message-ID: <5817C3F1-F15D-4745-81A9-C667F389D7E2@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 21 Jan 2011 19:24:50 +0000 (UTC) diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h index bae194a..bd6ac06 100644 --- a/arch/arm/plat-pxa/include/plat/sdhci.h +++ b/arch/arm/plat-pxa/include/plat/sdhci.h @@ -15,7 +15,6 @@ /* pxa specific flag */ /* Require clock free running */ -#define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) #define PXA_FLAG_CARD_PERMANENT (1<<1) /* Board design supports 8-bit data on SD/SDIO BUS */ diff --git a/drivers/mmc/host/sdhci-pxa.c b/drivers/mmc/host/sdhci-pxa.c index 5a61208..4713238 100644 --- a/drivers/mmc/host/sdhci-pxa.c +++ b/drivers/mmc/host/sdhci-pxa.c @@ -29,9 +29,6 @@ #define DRIVER_NAME "sdhci-pxa" -#define SD_FIFO_PARAM 0x104 -#define DIS_PAD_SD_CLK_GATE 0x400 - struct sdhci_pxa { struct sdhci_host *host; struct sdhci_pxa_platdata *pdata; @@ -49,7 +46,6 @@ struct sdhci_pxa { static void set_clock(struct sdhci_host *host, unsigned int clock) { struct sdhci_pxa *pxa = sdhci_priv(host); - u32 tmp = 0; if (clock == 0) { if (pxa->clk_enable) { @@ -58,11 +54,6 @@ static void set_clock(struct sdhci_host *host, unsigned int clock) } } else { if (0 == pxa->clk_enable) { - if (pxa->pdata->flags & PXA_FLAG_DISABLE_CLOCK_GATING) { - tmp = readl(host->ioaddr + SD_FIFO_PARAM); - tmp |= DIS_PAD_SD_CLK_GATE; - writel(tmp, host->ioaddr + SD_FIFO_PARAM); - } clk_enable(pxa->clk); pxa->clk_enable = 1; }