From patchwork Wed Sep 29 00:46:18 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Madhusudhan X-Patchwork-Id: 216192 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8T0khut009972 for ; Wed, 29 Sep 2010 00:46:43 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754608Ab0I2AqX (ORCPT ); Tue, 28 Sep 2010 20:46:23 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:51685 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754560Ab0I2AqW (ORCPT ); Tue, 28 Sep 2010 20:46:22 -0400 Received: from dlep33.itg.ti.com ([157.170.170.112]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o8T0kJl4000330 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 28 Sep 2010 19:46:19 -0500 Received: from webmail.ti.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id o8T0kFXo029925; Tue, 28 Sep 2010 19:46:16 -0500 (CDT) Received: from 192.168.10.88 (proxying for 128.247.79.84) (SquirrelMail authenticated user x0070977); by dbdmail.itg.ti.com with HTTP; Wed, 29 Sep 2010 06:16:18 +0530 (IST) Message-ID: <65452.192.168.10.88.1285721178.squirrel@dbdmail.itg.ti.com> Date: Wed, 29 Sep 2010 06:16:18 +0530 (IST) Subject: [PATCH V2] OMAP4 ES2: HSMMC soft reset change From: "Madhusudhan Chikkature" To: tony@atomide.com Cc: linux-mmc@vger.kernel.org, linux-omap@vger.kernel.org, cjb@laptop.org User-Agent: SquirrelMail/1.4.3a X-Mailer: SquirrelMail/1.4.3a MIME-Version: 1.0 X-Priority: 3 (Normal) Importance: Normal Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 29 Sep 2010 00:46:43 +0000 (UTC) diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 87ce6ff..37f9f56 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -298,6 +298,9 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) else mmc->slots[0].features |= HSMMC_HAS_PBIAS; + if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0)) + mmc->slots[0].features |= HSMMC_HAS_UPDATED_RESET; + switch (c->mmc) { case 1: if (mmc->slots[0].features & HSMMC_HAS_PBIAS) { diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h index 4f819fc..2c4629a 100644 --- a/arch/arm/plat-omap/include/plat/mmc.h +++ b/arch/arm/plat-omap/include/plat/mmc.h @@ -103,6 +103,7 @@ struct omap_mmc_platform_data { /* we can put the features above into this variable */ #define HSMMC_HAS_PBIAS (1 << 0) +#define HSMMC_HAS_UPDATED_RESET (1 << 1) unsigned features; int switch_pin; /* gpio (card detect) */ diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 53f8fa5..69858e7 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -982,6 +982,17 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, OMAP_HSMMC_WRITE(host->base, SYSCTL, OMAP_HSMMC_READ(host->base, SYSCTL) | bit); + /* + * OMAP4 ES2 and greater has an updated reset logic. + * Monitor a 0->1 transition first + */ + if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { + while ((!(OMAP_HSMMC_READ(host, SYSCTL) & bit)) + && (i++ < limit)) + cpu_relax(); + } + i = 0; + while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && (i++ < limit))