From patchwork Fri Jan 21 19:23:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Rakity X-Patchwork-Id: 496171 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p0LJOOH4003667 for ; Fri, 21 Jan 2011 19:24:50 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754778Ab1AUTYt (ORCPT ); Fri, 21 Jan 2011 14:24:49 -0500 Received: from na3sys009aog113.obsmtp.com ([74.125.149.209]:38811 "HELO na3sys009aog113.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1753971Ab1AUTYt convert rfc822-to-8bit (ORCPT ); Fri, 21 Jan 2011 14:24:49 -0500 Received: from source ([65.219.4.129]) (using TLSv1) by na3sys009aob113.postini.com ([74.125.148.12]) with SMTP ID DSNKTTndgNx+rJch06Yo9PzHTue6wJ/MWiXr@postini.com; Fri, 21 Jan 2011 11:24:49 PST Received: from SC-vEXCH3.marvell.com ([10.93.76.133]) by SC-OWA01.marvell.com ([10.93.76.21]) with mapi; Fri, 21 Jan 2011 11:23:20 -0800 From: Philip Rakity To: "linux-mmc@vger.kernel.org" CC: Mark Brown Date: Fri, 21 Jan 2011 11:23:19 -0800 Subject: [PATCH] sdhci: ensure clocks are enabled on all SD controllers Thread-Topic: [PATCH] sdhci: ensure clocks are enabled on all SD controllers Thread-Index: Acu5oKl3JheKc6hCRWKuTTRhGos2Jg== Message-ID: <9D8709D5-8857-4D09-BE2B-D703C119B75D@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 21 Jan 2011 19:24:50 +0000 (UTC) diff --git a/drivers/mmc/host/sdhci-pxa.c b/drivers/mmc/host/sdhci-pxa.c index 4713238..8c60d5c 100644 --- a/drivers/mmc/host/sdhci-pxa.c +++ b/drivers/mmc/host/sdhci-pxa.c @@ -35,7 +35,7 @@ struct sdhci_pxa { struct clk *clk; struct resource *res; - u8 clk_enable; + u8 clk_enable; }; /*****************************************************************************\ @@ -43,25 +43,17 @@ struct sdhci_pxa { * SDHCI core callbacks * * * \*****************************************************************************/ -static void set_clock(struct sdhci_host *host, unsigned int clock) +static void enable_clock(struct sdhci_host *host) { struct sdhci_pxa *pxa = sdhci_priv(host); - if (clock == 0) { - if (pxa->clk_enable) { - clk_disable(pxa->clk); - pxa->clk_enable = 0; - } - } else { - if (0 == pxa->clk_enable) { - clk_enable(pxa->clk); - pxa->clk_enable = 1; - } + if (pxa->clk_enable == 0) { + clk_enable(pxa->clk); + pxa->clk_enable = 1; } } static struct sdhci_ops sdhci_pxa_ops = { - .set_clock = set_clock, }; /*****************************************************************************\ @@ -136,6 +128,9 @@ static int __devinit sdhci_pxa_probe(struct platform_device *pdev) if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT) host->mmc->caps |= MMC_CAP_8_BIT_DATA; + /* do not rely on u-boot to enable the clocks */ + enable_clock(host); + ret = sdhci_add_host(host); if (ret) { dev_err(&pdev->dev, "failed to add host\n"); @@ -181,10 +176,6 @@ static int __devexit sdhci_pxa_remove(struct platform_device *pdev) if (pxa->res) release_mem_region(pxa->res->start, resource_size(pxa->res)); - if (pxa->clk_enable) { - clk_disable(pxa->clk); - pxa->clk_enable = 0; - } clk_put(pxa->clk); sdhci_free_host(host);