From patchwork Mon Feb 14 06:58:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Rakity X-Patchwork-Id: 554101 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1E73UAC011132 for ; Mon, 14 Feb 2011 07:03:30 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751357Ab1BNHDa (ORCPT ); Mon, 14 Feb 2011 02:03:30 -0500 Received: from na3sys009aog110.obsmtp.com ([74.125.149.203]:32812 "EHLO na3sys009aog110.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751373Ab1BNHD3 convert rfc822-to-8bit (ORCPT ); Mon, 14 Feb 2011 02:03:29 -0500 Received: from source ([65.219.4.130]) (using TLSv1) by na3sys009aob110.postini.com ([74.125.148.12]) with SMTP ID DSNKTVjTwCh0h4yfUGI6AtEOl/q1r/TduMDn@postini.com; Sun, 13 Feb 2011 23:03:29 PST Received: from SC-vEXCH3.marvell.com ([10.93.76.133]) by sc-owa02.marvell.com ([10.93.76.22]) with mapi; Sun, 13 Feb 2011 22:58:58 -0800 From: Philip Rakity To: "linux-mmc@vger.kernel.org" CC: Mark Brown Date: Sun, 13 Feb 2011 22:58:56 -0800 Subject: [PATCH 1/5] sdhci: sdhci-pxa.c: delete clk gating code - not correct Thread-Topic: [PATCH 1/5] sdhci: sdhci-pxa.c: delete clk gating code - not correct Thread-Index: AcvMFKZmsLUreQdKSOCa/svCt4EZWg== Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 14 Feb 2011 07:03:30 +0000 (UTC) diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h index bae194a..bd6ac06 100644 --- a/arch/arm/plat-pxa/include/plat/sdhci.h +++ b/arch/arm/plat-pxa/include/plat/sdhci.h @@ -15,7 +15,6 @@ /* pxa specific flag */ /* Require clock free running */ -#define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) #define PXA_FLAG_CARD_PERMANENT (1<<1) /* Board design supports 8-bit data on SD/SDIO BUS */ diff --git a/drivers/mmc/host/sdhci-pxa.c b/drivers/mmc/host/sdhci-pxa.c index 5a61208..4713238 100644 --- a/drivers/mmc/host/sdhci-pxa.c +++ b/drivers/mmc/host/sdhci-pxa.c @@ -29,9 +29,6 @@ #define DRIVER_NAME "sdhci-pxa" -#define SD_FIFO_PARAM 0x104 -#define DIS_PAD_SD_CLK_GATE 0x400 - struct sdhci_pxa { struct sdhci_host *host; struct sdhci_pxa_platdata *pdata; @@ -49,7 +46,6 @@ struct sdhci_pxa { static void set_clock(struct sdhci_host *host, unsigned int clock) { struct sdhci_pxa *pxa = sdhci_priv(host); - u32 tmp = 0; if (clock == 0) { if (pxa->clk_enable) { @@ -58,11 +54,6 @@ static void set_clock(struct sdhci_host *host, unsigned int clock) } } else { if (0 == pxa->clk_enable) { - if (pxa->pdata->flags & PXA_FLAG_DISABLE_CLOCK_GATING) { - tmp = readl(host->ioaddr + SD_FIFO_PARAM); - tmp |= DIS_PAD_SD_CLK_GATE; - writel(tmp, host->ioaddr + SD_FIFO_PARAM); - } clk_enable(pxa->clk); pxa->clk_enable = 1; }