From patchwork Wed Jan 5 09:39:09 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhangfei Gao X-Patchwork-Id: 453021 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p059dCgo032112 for ; Wed, 5 Jan 2011 09:39:12 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751622Ab1AEJjM (ORCPT ); Wed, 5 Jan 2011 04:39:12 -0500 Received: from mail-fx0-f46.google.com ([209.85.161.46]:38682 "EHLO mail-fx0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751514Ab1AEJjL (ORCPT ); Wed, 5 Jan 2011 04:39:11 -0500 Received: by fxm20 with SMTP id 20so14862040fxm.19 for ; Wed, 05 Jan 2011 01:39:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:date:message-id :subject:from:to:cc:content-type; bh=/UZgXqsVDVqtGUqRtvYloR/8ltsfOkfmt9HN5YHaaPw=; b=ZQkWccycAg39ffpr7yF/vhgUpMC0jy8JvfU8cFuio8ERxdvyuKQ+O7+twS/Lt4/NyD PuHoi5VbPmrAduJAq/7bJvd7neQxpqfK1TutvUencDD5biLKd97YtmyL6yQsMLjIFMrN DZfAlMxIW1Tzw9GENO4eMXqH7z8j4bpAH0BDk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:cc:content-type; b=MouxZBatuG7egJJYEDtQV8bGOI0XYtUFcL2BdFrXS7rTn3mfRVuOQaLoQuE2+wTZkX KsnI2+t/maSC9UTCvpS7IuH/XUJHQCpG8zm2DYxvPvv5/KNvGEzYztb5UtE4LI0WKpv1 NL42qj6q8wrLblSdnYIs8bTwN/tib+aQIYVUU= MIME-Version: 1.0 Received: by 10.223.54.132 with SMTP id q4mr367151fag.117.1294220349599; Wed, 05 Jan 2011 01:39:09 -0800 (PST) Received: by 10.223.122.210 with HTTP; Wed, 5 Jan 2011 01:39:09 -0800 (PST) Date: Wed, 5 Jan 2011 04:39:09 -0500 Message-ID: Subject: mmc: sdhci stop SDCLK during asynchronous interrupt peroid From: zhangfei gao To: linux-mmc@vger.kernel.org Cc: Chris Ball , Linus Walleij Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 05 Jan 2011 09:39:30 +0000 (UTC) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index aafbb42..946b947 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1261,6 +1261,15 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + if (mmc->caps & MMC_CAP_CLOCK_GATE) { + u16 con; + + con = readw(host->ioaddr + SDHCI_HOST_CONTROL2); + con |= SDHCI_CTRL2_AINT; + writew(con, host->ioaddr + SDHCI_HOST_CONTROL2); + } + + out: mmiowb(); spin_unlock_irqrestore(&host->lock, flags); @@ -1808,6 +1817,11 @@ int sdhci_add_host(struct sdhci_host *host) mmc->caps |= (MMC_CAP_1_8V_DDR); } + if (mmc->caps & MMC_CAP_CLOCK_GATE) { + if (!(caps & SDHCI_CAN_ASYN_INT)) + mmc->caps &= ~MMC_CAP_CLOCK_GATE; + } + if (host->quirks & SDHCI_QUIRK_FORCE_DMA) host->flags |= SDHCI_USE_SDMA; else if (!(caps & SDHCI_CAN_DO_SDMA)) diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index c4bd5dd..907de87 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -153,6 +153,7 @@ #define SDHCI_CTRL2_SDR104 0x0003 #define SDHCI_CTRL2_DDR50 0x0004 #define SDHCI_CTRL2_1_8V 0x0008 +#define SDHCI_CTRL2_AINT 0x4000 #define SDHCI_CAPABILITIES 0x40 #define SDHCI_TIMEOUT_CLK_MASK 0x0000003F @@ -172,6 +173,7 @@ #define SDHCI_CAN_VDD_300 0x02000000 #define SDHCI_CAN_VDD_180 0x04000000 #define SDHCI_CAN_64BIT 0x10000000 +#define SDHCI_CAN_ASYN_INT 0x20000000 #define SDHCI_CAPABILITIES_1 0x44 #define SDHCI_CAN_SDR50 0x00000001 diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index bcb793e..2a53a94 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -173,6 +173,8 @@ struct mmc_host { /* DDR mode at 1.2V */ #define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */ #define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */ +#define MMC_CAP_CLOCK_GATE (1 << 15) /* V3 controller */ + /* support clock gating */ mmc_pm_flag_t pm_caps; /* supported pm features */