From patchwork Tue Apr 19 02:02:55 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Barry Song <21cnbao@gmail.com> X-Patchwork-Id: 716881 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p3J23HFg026409 for ; Tue, 19 Apr 2011 02:03:17 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753655Ab1DSCDQ (ORCPT ); Mon, 18 Apr 2011 22:03:16 -0400 Received: from mail-pw0-f46.google.com ([209.85.160.46]:46135 "EHLO mail-pw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753010Ab1DSCDP convert rfc822-to-8bit (ORCPT ); Mon, 18 Apr 2011 22:03:15 -0400 Received: by pwi15 with SMTP id 15so2519444pwi.19 for ; Mon, 18 Apr 2011 19:03:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:from:date:message-id:subject:to:cc :content-type:content-transfer-encoding; bh=76seQMbOhKxdLyEgKQOV5aZeBvYK7p8WX1o0suV6pM4=; b=h/Vo+jyQlep14hhwb/9ZzKSlwM7hPrds0onq+DGK9hPwvKZoYe6DbIhMshlzRYDhg0 ieAb56Qd74IqH5BH51PwDJZ26Mf63ggpcuQI13LWoi7YdUl3dHPfH4yzHGpxWA320YBn aQEeKiqkFFgMFAA/njq42r9qOrhXVH0Z2uCpM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:cc:content-type :content-transfer-encoding; b=orqj7m7GrPmoLC23z3GChdA+7qNf+/NFecWpm3TywDqGQw1wP+/2gRbrIrQAoJj9QM ln+0jYHlwhrW0Rh6ZdQC6+Y1N5EvLMRvTwYBYMKd3MOJN2JNoJZD44d5DJ4Gce0IhMQ2 /7yz3R8QdpU/qP317F99DAv/69HtuDR4TvZhs= Received: by 10.68.40.40 with SMTP id u8mr7777930pbk.333.1303178595037; Mon, 18 Apr 2011 19:03:15 -0700 (PDT) MIME-Version: 1.0 Received: by 10.68.48.40 with HTTP; Mon, 18 Apr 2011 19:02:55 -0700 (PDT) From: Barry Song <21cnbao@gmail.com> Date: Tue, 19 Apr 2011 10:02:55 +0800 Message-ID: Subject: MMC Quirks Clarification and Shared Data Pins SDHCI Host Controller Driver To: linux-mmc@vger.kernel.org Cc: bin.shi@csr.com Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 19 Apr 2011 02:03:17 +0000 (UTC) Barry Song <21cnbao@gmail.com> on behalf of Shi bin > > Hi, list, I’m new to here for investigating sd/mmc driver in our Cortex-A9 Single core platform board. Our sd/mmc host controller is fully compatible with standard SD specification 2.0 but one specific feature: slot 0 and slot 2 shared 8 bits data pins, which means at one time, only one slot could be accessed through 8 bits data pins with a switch defined in controller register. I have researched in SDHCI driver in Linux kernel and don’t find any codes dealing with the feature I mentioned, right? What I consider about is, high layer send r/w request to mmc core, and sdhci_request in lower driver be fired, I just add logic about switch 8 bits data pins here. Other defined functions or callbacks seems could not handler this thing, eg platform_8bit_width() and platform_send_init_74_clocks(). Our sd/mmc host controller driver is a wrapper on standard SDHCI driver. So, all in all, I apply additional new quirks(occupy last bit 31) and sdhci_ops callback shared_data_bus as below. mmc_request_done(host->mmc, mrq); + + if (host->quirks & SDHCI_QUIRK_SHARE_DATA_PINS) + host->ops->shared_data_bus(host, 0); } static void sdhci_timeout_timer(unsigned long data) My questions is 1) What’s purpose of quirks? For lots of sd/mmc host controller different feature and IC bugs? 2) My patch has modified kernel mmc core codes to achieve my purpose(shared 8 data pins on runtime), is it acceptable? Any suggestion and comment will be welcome! Best Regards, Shi Bin --- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: include/linux/mmc/sdhci.h =================================================================== --- include/linux/mmc/sdhci.h (revision 4482) +++ include/linux/mmc/sdhci.h (working copy) @@ -85,8 +85,6 @@ #define SDHCI_QUIRK_NO_HISPD_BIT (1<<29) /* Controller treats ADMA descriptors with length 0000h incorrectly */ #define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1<<30) +/* Controller share 8 bits data pins */ +#define SDHCI_QUIRK_SHARE_DATA_PINS (1<<31) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ Index: drivers/mmc/host/sdhci.h =================================================================== --- drivers/mmc/host/sdhci.h (revision 4481) +++ drivers/mmc/host/sdhci.h (working copy) @@ -222,8 +222,6 @@ void (*platform_send_init_74_clocks)(struct sdhci_host *host, u8 power_mode); unsigned int (*get_ro)(struct sdhci_host *host); + void (*shared_data_bus)(struct sdhci_host *host, + int acquire); }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS Index: drivers/mmc/host/sdhci.c =================================================================== --- drivers/mmc/host/sdhci.c (revision 4485) +++ drivers/mmc/host/sdhci.c (working copy) @@ -1124,9 +1124,6 @@ host = mmc_priv(mmc); + if (host->quirks & SDHCI_QUIRK_SHARE_DATA_PINS) + host->ops->shared_data_bus(host, 1); + spin_lock_irqsave(&host->lock, flags); WARN_ON(host->mrq != NULL); @@ -1381,9 +1378,6 @@ spin_unlock_irqrestore(&host->lock, flags);