From patchwork Fri Mar 25 13:36:17 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 662191 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2PDaF9n016782 for ; Fri, 25 Mar 2011 13:36:22 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753164Ab1CYNgV (ORCPT ); Fri, 25 Mar 2011 09:36:21 -0400 Received: from moutng.kundenserver.de ([212.227.126.187]:53413 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752400Ab1CYNgT (ORCPT ); Fri, 25 Mar 2011 09:36:19 -0400 Received: from axis700.grange (pD9EB8EC2.dip0.t-ipconnect.de [217.235.142.194]) by mrelayeu.kundenserver.de (node=mrbap3) with ESMTP (Nemesis) id 0MT82Y-1QT4Im04xC-00S6mx; Fri, 25 Mar 2011 14:36:18 +0100 Received: by axis700.grange (Postfix, from userid 1000) id B0356189B86; Fri, 25 Mar 2011 14:36:17 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id AD4C9189B85; Fri, 25 Mar 2011 14:36:17 +0100 (CET) Date: Fri, 25 Mar 2011 14:36:17 +0100 (CET) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: linux-sh@vger.kernel.org cc: linux-mmc@vger.kernel.org, Ian Molton , Chris Ball Subject: [PATCH 2/2 v2] mmc: tmio: use PIO for short transfers In-Reply-To: Message-ID: References: MIME-Version: 1.0 X-Provags-ID: V02:K0:fijpmlyyB4FIrgVXUhNBqY8ua5V7LclU27hCdIkG17d vnWfZ5iNmU0ZBdYXLrqC9YL8ehz5ieubbiUCmQs5eP2PnIoByV MdRnYd9g/byZTL6Yq3RUOSQ6iPGw0Gdy7Uk1gLaN1J1/u29wG6 P74lKOlLrHug/NzF+IB4A6/p6LvkbXgf7rxRB4POIQXUDS514m nWahDUhG4tvrB0b5z4RARqQpcdyyQU1rS/45Ef4+SE= Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 25 Mar 2011 13:36:22 +0000 (UTC) diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index e88627b..32ab145 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c @@ -100,6 +100,8 @@ TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) +#define TMIO_MIN_DMA_LEN 8 + #define enable_mmc_irqs(host, i) \ do { \ u32 mask;\ @@ -147,6 +149,7 @@ struct tmio_mmc_host { struct platform_device *pdev; /* DMA support */ + bool force_pio; struct dma_chan *chan_rx; struct dma_chan *chan_tx; struct tasklet_struct dma_complete; @@ -385,6 +388,7 @@ static void tmio_mmc_reset_work(struct work_struct *work) host->cmd = NULL; host->data = NULL; host->mrq = NULL; + host->force_pio = false; spin_unlock_irqrestore(&host->lock, flags); @@ -404,6 +408,7 @@ tmio_mmc_finish_request(struct tmio_mmc_host *host) host->mrq = NULL; host->cmd = NULL; host->data = NULL; + host->force_pio = false; cancel_delayed_work(&host->delayed_reset_work); @@ -485,7 +490,7 @@ static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) unsigned int count; unsigned long flags; - if (host->chan_tx || host->chan_rx) { + if ((host->chan_tx || host->chan_rx) && !host->force_pio) { pr_err("PIO IRQ in DMA mode!\n"); return; } else if (!data) { @@ -551,15 +556,11 @@ static void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) */ if (data->flags & MMC_DATA_READ) { - if (!host->chan_rx) - disable_mmc_irqs(host, TMIO_MASK_READOP); - else + if (host->chan_rx && !host->force_pio) tmio_check_bounce_buffer(host); dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", host->mrq); } else { - if (!host->chan_tx) - disable_mmc_irqs(host, TMIO_MASK_WRITEOP); dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", host->mrq); } @@ -583,7 +584,7 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host) if (!data) goto out; - if (host->chan_tx && (data->flags & MMC_DATA_WRITE)) { + if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { /* * Has all data been written out yet? Testing on SuperH showed, * that in most cases the first interrupt comes already with the @@ -596,11 +597,12 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host) disable_mmc_irqs(host, TMIO_STAT_DATAEND); tasklet_schedule(&host->dma_complete); } - } else if (host->chan_rx && (data->flags & MMC_DATA_READ)) { + } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) { disable_mmc_irqs(host, TMIO_STAT_DATAEND); tasklet_schedule(&host->dma_complete); } else { tmio_mmc_do_data_irq(host); + disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); } out: spin_unlock(&host->lock); @@ -649,12 +651,12 @@ static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, */ if (host->data && !cmd->error) { if (host->data->flags & MMC_DATA_READ) { - if (!host->chan_rx) + if (host->force_pio || !host->chan_rx) enable_mmc_irqs(host, TMIO_MASK_READOP); else tasklet_schedule(&host->dma_issue); } else { - if (!host->chan_tx) + if (host->force_pio || !host->chan_tx) enable_mmc_irqs(host, TMIO_MASK_WRITEOP); else tasklet_schedule(&host->dma_issue); @@ -810,6 +812,11 @@ static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host) goto pio; } + if (sg->length < TMIO_MIN_DMA_LEN) { + host->force_pio = true; + return; + } + disable_mmc_irqs(host, TMIO_STAT_RXRDY); /* The only sg element can be unaligned, use our bounce buffer then */ @@ -878,6 +885,11 @@ static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host) goto pio; } + if (sg->length < TMIO_MIN_DMA_LEN) { + host->force_pio = true; + return; + } + disable_mmc_irqs(host, TMIO_STAT_TXRQ); /* The only sg element can be unaligned, use our bounce buffer then */ @@ -1119,6 +1131,7 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) fail: host->mrq = NULL; + host->force_pio = false; mrq->cmd->error = ret; mmc_request_done(mmc, mrq); }