| Message ID | e2d3b19e06fa29116b8032addc70c8dc1ec3866e.1718697954.git.unicorn_wang@outlook.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | mmc: sdhci-of-dwcmshc: Add Sophgo SG2042 support | expand |
On 18/06/2024 10:39, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > SG2042 has two MMC controller, one for emmc, another for sd-card. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > --- > .../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 17 ++++++++++ > arch/riscv/boot/dts/sophgo/sg2042.dtsi | 32 +++++++++++++++++++ > 2 files changed, 49 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts > index 49b4b9c2c101..164db23586e0 100644 > --- a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts > +++ b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts > @@ -14,6 +14,23 @@ chosen { > }; > }; > > +&emmc { > + bus-width = <4>; > + no-sdio; > + no-sd; > + non-removable; > + wp-inverted; > + status = "okay"; > +}; > + > +&sd { > + bus-width = <4>; > + no-sdio; > + no-mmc; > + wp-inverted; > + status = "okay"; > +}; > + > &uart0 { > status = "okay"; > }; > diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi > index 81fda312f988..bfdfd6f32912 100644 > --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi > +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi > @@ -346,5 +346,37 @@ uart0: serial@7040000000 { > resets = <&rstgen RST_UART0>; > status = "disabled"; > }; > + > + emmc: mmc@704002a000 { > + compatible = "sophgo,sg2042-dwcmshc"; > + reg = <0x70 0x4002A000 0x0 0x1000>; Lowercase hex. > + interrupt-parent = <&intc>; > + interrupts = <134 IRQ_TYPE_LEVEL_HIGH>; > + clocks = Odd wrapping. Don't. See DTS coding style. > + <&clkgen GATE_CLK_AXI_EMMC>, > + <&clkgen GATE_CLK_100K_EMMC>, > + <&clkgen GATE_CLK_EMMC_100M>; > + clock-names = Ditto > + "core", > + "timer", > + "card"; > + status = "disabled"; Best regards, Krzysztof
$subject: riscv: dts: add mmc controllers for Sophgo SG2042 SoC Could you add a sopho: prefix in that please?
diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts index 49b4b9c2c101..164db23586e0 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts +++ b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts @@ -14,6 +14,23 @@ chosen { }; }; +&emmc { + bus-width = <4>; + no-sdio; + no-sd; + non-removable; + wp-inverted; + status = "okay"; +}; + +&sd { + bus-width = <4>; + no-sdio; + no-mmc; + wp-inverted; + status = "okay"; +}; + &uart0 { status = "okay"; }; diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index 81fda312f988..bfdfd6f32912 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -346,5 +346,37 @@ uart0: serial@7040000000 { resets = <&rstgen RST_UART0>; status = "disabled"; }; + + emmc: mmc@704002a000 { + compatible = "sophgo,sg2042-dwcmshc"; + reg = <0x70 0x4002A000 0x0 0x1000>; + interrupt-parent = <&intc>; + interrupts = <134 IRQ_TYPE_LEVEL_HIGH>; + clocks = + <&clkgen GATE_CLK_AXI_EMMC>, + <&clkgen GATE_CLK_100K_EMMC>, + <&clkgen GATE_CLK_EMMC_100M>; + clock-names = + "core", + "timer", + "card"; + status = "disabled"; + }; + + sd: mmc@704002b000 { + compatible = "sophgo,sg2042-dwcmshc"; + reg = <0x70 0x4002B000 0x0 0x1000>; + interrupt-parent = <&intc>; + interrupts = <136 IRQ_TYPE_LEVEL_HIGH>; + clocks = + <&clkgen GATE_CLK_AXI_SD>, + <&clkgen GATE_CLK_100K_SD>, + <&clkgen GATE_CLK_SD_100M>; + clock-names = + "core", + "timer", + "card"; + status = "disabled"; + }; }; };