From patchwork Fri May 29 22:58:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Toshi Kani X-Patchwork-Id: 6511831 Return-Path: X-Original-To: patchwork-linux-nvdimm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 48E2CC0020 for ; Fri, 29 May 2015 23:18:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7A45C20836 for ; Fri, 29 May 2015 23:18:51 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7D7B920834 for ; Fri, 29 May 2015 23:18:50 +0000 (UTC) Received: from ml01.vlan14.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 3EBEC182903; Fri, 29 May 2015 16:18:50 -0700 (PDT) X-Original-To: linux-nvdimm@lists.01.org Delivered-To: linux-nvdimm@lists.01.org Received: from g9t5008.houston.hp.com (g9t5008.houston.hp.com [15.240.92.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5A0D41828BF for ; Fri, 29 May 2015 16:18:49 -0700 (PDT) Received: from g4t3433.houston.hp.com (g4t3433.houston.hp.com [16.210.25.219]) by g9t5008.houston.hp.com (Postfix) with ESMTP id 72AB517F; Fri, 29 May 2015 23:18:48 +0000 (UTC) Received: from misato.fc.hp.com (misato.fc.hp.com [16.78.168.61]) by g4t3433.houston.hp.com (Postfix) with ESMTP id 2146C5F; Fri, 29 May 2015 23:18:47 +0000 (UTC) From: Toshi Kani To: bp@alien8.de, hpa@zytor.com, tglx@linutronix.de, mingo@redhat.com, akpm@linux-foundation.org, arnd@arndb.de Subject: [PATCH v11 1/12] x86, mm, pat: Cleanup init flags in pat_init() Date: Fri, 29 May 2015 16:58:59 -0600 Message-Id: <1432940350-1802-2-git-send-email-toshi.kani@hp.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1432940350-1802-1-git-send-email-toshi.kani@hp.com> References: <1432940350-1802-1-git-send-email-toshi.kani@hp.com> Cc: jgross@suse.com, konrad.wilk@oracle.com, linux-nvdimm@lists.01.org, mcgrof@suse.com, x86@kernel.org, linux-kernel@vger.kernel.org, stefan.bader@canonical.com, luto@amacapital.net, linux-mm@kvack.org, hmh@hmh.eng.br, hch@lst.de X-BeenThere: linux-nvdimm@lists.01.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "Linux-nvdimm developer list." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linux-nvdimm-bounces@lists.01.org Sender: "Linux-nvdimm" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Toshi Kani pat_init() uses two flags, 'boot_cpu' and 'boot_pat_state', for tracking the boot CPU's initialization status. 'boot_pat_state' is also overloaded to carry the boot PAT value. This patch cleans this up by replacing them with a new single flag, 'boot_cpu_done', to track the boot CPU's initialization status. 'boot_pat_state' is only used to carry the boot PAT value as a result. Suggested-by: Thomas Gleixner Signed-off-by: Toshi Kani --- arch/x86/mm/pat.c | 40 +++++++++++++++++++--------------------- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index a1c9654..e1ec6a7 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c @@ -197,24 +197,29 @@ void pat_init_cache_modes(void) void pat_init(void) { u64 pat; - bool boot_cpu = !boot_pat_state; + static bool boot_cpu_done; if (!pat_enabled()) return; - if (!cpu_has_pat) { - if (!boot_pat_state) { + if (!boot_cpu_done) { + if (!cpu_has_pat) { pat_disable("PAT not supported by CPU."); return; - } else { - /* - * If this happens we are on a secondary CPU, but - * switched to PAT on the boot CPU. We have no way to - * undo PAT. - */ - pr_err("x86/PAT: PAT enabled, but not supported by secondary CPU\n"); - BUG(); } + + rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); + if (!boot_pat_state) { + pat_disable("PAT read returns always zero, disabled."); + return; + } + } else if (!cpu_has_pat) { + /* + * If this happens we are on a secondary CPU, but + * switched to PAT on the boot CPU. We have no way to + * undo PAT. + */ + panic("PAT enabled, but not supported by secondary CPU\n"); } /* Set PWT to Write-Combining. All other bits stay the same */ @@ -233,19 +238,12 @@ void pat_init(void) pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC); - /* Boot CPU check */ - if (!boot_pat_state) { - rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); - if (!boot_pat_state) { - pat_disable("PAT read returns always zero, disabled."); - return; - } - } - wrmsrl(MSR_IA32_CR_PAT, pat); - if (boot_cpu) + if (!boot_cpu_done) { pat_init_cache_modes(); + boot_cpu_done = true; + } } #undef PAT