From patchwork Wed Aug 26 00:16:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 7073651 X-Patchwork-Delegate: dan.j.williams@gmail.com Return-Path: X-Original-To: patchwork-linux-nvdimm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 49C3FC05AC for ; Wed, 26 Aug 2015 00:16:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 52AA1208B9 for ; Wed, 26 Aug 2015 00:16:10 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BA6A920883 for ; Wed, 26 Aug 2015 00:16:08 +0000 (UTC) Received: from ml01.vlan14.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8353F1827AB; Tue, 25 Aug 2015 17:16:08 -0700 (PDT) X-Original-To: linux-nvdimm@lists.01.org Delivered-To: linux-nvdimm@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by ml01.01.org (Postfix) with ESMTP id C1F26182775 for ; Tue, 25 Aug 2015 17:16:07 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 25 Aug 2015 17:16:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,412,1437462000"; d="scan'208";a="632225246" Received: from orsmsx108.amr.corp.intel.com ([10.22.240.6]) by orsmga003.jf.intel.com with ESMTP; 25 Aug 2015 17:16:07 -0700 Received: from orsmsx111.amr.corp.intel.com (10.22.240.12) by ORSMSX108.amr.corp.intel.com (10.22.240.6) with Microsoft SMTP Server (TLS) id 14.3.224.2; Tue, 25 Aug 2015 17:16:07 -0700 Received: from orsmsx107.amr.corp.intel.com ([169.254.1.234]) by ORSMSX111.amr.corp.intel.com ([169.254.11.185]) with mapi id 14.03.0224.002; Tue, 25 Aug 2015 17:16:07 -0700 From: "Williams, Dan J" To: "torvalds@linux-foundation.org" Subject: [GIT PULL] libnvdimm fix for 4.2 Thread-Topic: [GIT PULL] libnvdimm fix for 4.2 Thread-Index: AQHQ35RmMYW/sQCx5UmoF1oR8fszrg== Date: Wed, 26 Aug 2015 00:16:06 +0000 Message-ID: <1440548164.31365.13.camel@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.22.254.140] Content-ID: <140300644124DD46B17F8D0CF7CCC231@intel.com> MIME-Version: 1.0 Cc: "linux-acpi@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-nvdimm@lists.01.org" X-BeenThere: linux-nvdimm@lists.01.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "Linux-nvdimm developer list." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linux-nvdimm-bounces@lists.01.org Sender: "Linux-nvdimm" X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Linus please pull from... git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm libnvdimm-fixes ...to receive a single fix for the nd_blk driver. The effect of getting the width of this register read wrong is that all I/O fails when the read returns non-zero. Given the availability of ACPI 6 NFIT enabled platforms, this could reasonably wait to come in during the 4.3 merge window with a tag for 4.2-stable. Otherwise, this makes the 4.2 kernel fully functional with devices that conform to the mmio-block-apertures defined in the ACPI 6 NFIT (NVDIMM Firmware Interface Table). Full changelog and diffstat below. --- The following changes since commit cbfe8fa6cd672011c755c3cd85c9ffd4e2d10a6f: Linux 4.2-rc4 (2015-07-26 12:26:21 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm libnvdimm-fixes for you to fetch changes up to de4a196c02a2a2631b516d90da6e8d052ccb07e8: nfit, nd_blk: BLK status register is only 32 bits (2015-08-25 19:42:01 -0400) ---------------------------------------------------------------- Ross Zwisler (1): nfit, nd_blk: BLK status register is only 32 bits drivers/acpi/nfit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- commit de4a196c02a2a2631b516d90da6e8d052ccb07e8 Author: Ross Zwisler Date: Thu Aug 20 16:27:38 2015 -0600 nfit, nd_blk: BLK status register is only 32 bits Only read 32 bits for the BLK status register in read_blk_stat(). The format and size of this register is defined in the "NVDIMM Driver Writer's guide": http://pmem.io/documents/NVDIMM_Driver_Writers_Guide.pdf Signed-off-by: Ross Zwisler Reported-by: Nicholas Moulin Tested-by: Nicholas Moulin Reviewed-by: Jeff Moyer Signed-off-by: Dan Williams diff --git a/drivers/acpi/nfit.c b/drivers/acpi/nfit.c index 628a42c41ab1..bb29e56276bd 100644 --- a/drivers/acpi/nfit.c +++ b/drivers/acpi/nfit.c @@ -1024,7 +1024,7 @@ static void wmb_blk(struct nfit_blk *nfit_blk) wmb_pmem(); } -static u64 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) +static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) { struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; u64 offset = nfit_blk->stat_offset + mmio->size * bw; @@ -1032,7 +1032,7 @@ static u64 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) if (mmio->num_lines) offset = to_interleave_offset(offset, mmio); - return readq(mmio->base + offset); + return readl(mmio->base + offset); } static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,