Message ID | 167053492504.582963.9545867906512429034.stgit@dwillia2-xfh.jf.intel.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 17147be64cd8d43d800e5e4316ed4f7dd394dcbb |
Headers | show |
Series | cxl-cli test and usability updates | expand |
On Thu, Dec 08, 2022 at 01:28:45PM -0800, Dan Williams wrote: > The typical case is that CXL devices are pure ram devices. Only emit > capacity sizes when they are non-zero to avoid confusion around whether > pmem is available via partitioning or not. > > The confusion being that a user may assign more meaning to the zero size > value than it actually deserves. A zero value for either pmem or ram, > doesn't indicate the devices capability for either mode. Use the -I > option to cxl list to include paritition info in the memdev listing. > That will explicitly show the ram and pmem capabilities of the device. > > Do the same for ram_size on the odd case that someone builds a pure pmem > device. Reviewed-by: Alison Schofield <alison.schofield@intel.com> > > Cc: Alison Schofield <alison.schofield@intel.com> > [alison: clarify changelog] > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > --- > Documentation/cxl/cxl-list.txt | 5 ----- > cxl/json.c | 20 +++++++++++++------- > 2 files changed, 13 insertions(+), 12 deletions(-) > > diff --git a/Documentation/cxl/cxl-list.txt b/Documentation/cxl/cxl-list.txt > index 14a2b4bb5c2a..56229abcb053 100644 > --- a/Documentation/cxl/cxl-list.txt > +++ b/Documentation/cxl/cxl-list.txt > @@ -70,7 +70,6 @@ configured. > { > "memdev":"mem0", > "pmem_size":"256.00 MiB (268.44 MB)", > - "ram_size":0, > "serial":"0", > "host":"0000:35:00.0" > } > @@ -88,7 +87,6 @@ EXAMPLE > { > "memdev":"mem0", > "pmem_size":268435456, > - "ram_size":0, > "serial":0, > "host":"0000:35:00.0" > } > @@ -101,7 +99,6 @@ EXAMPLE > { > "memdev":"mem0", > "pmem_size":"256.00 MiB (268.44 MB)", > - "ram_size":0, > "serial":"0" > } > ] > @@ -129,7 +126,6 @@ OPTIONS > { > "memdev":"mem0", > "pmem_size":268435456, > - "ram_size":0, > "serial":0 > }, > { > @@ -204,7 +200,6 @@ OPTIONS > [ > { > "memdev":"mem0", > - "pmem_size":0, > "ram_size":273535729664, > "partition_info":{ > "total_size":273535729664, > diff --git a/cxl/json.c b/cxl/json.c > index 2f3639ede2f8..292e8428ccee 100644 > --- a/cxl/json.c > +++ b/cxl/json.c > @@ -305,7 +305,7 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, > { > const char *devname = cxl_memdev_get_devname(memdev); > struct json_object *jdev, *jobj; > - unsigned long long serial; > + unsigned long long serial, size; > int numa_node; > > jdev = json_object_new_object(); > @@ -316,13 +316,19 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, > if (jobj) > json_object_object_add(jdev, "memdev", jobj); > > - jobj = util_json_object_size(cxl_memdev_get_pmem_size(memdev), flags); > - if (jobj) > - json_object_object_add(jdev, "pmem_size", jobj); > + size = cxl_memdev_get_pmem_size(memdev); > + if (size) { > + jobj = util_json_object_size(size, flags); > + if (jobj) > + json_object_object_add(jdev, "pmem_size", jobj); > + } > > - jobj = util_json_object_size(cxl_memdev_get_ram_size(memdev), flags); > - if (jobj) > - json_object_object_add(jdev, "ram_size", jobj); > + size = cxl_memdev_get_ram_size(memdev); > + if (size) { > + jobj = util_json_object_size(size, flags); > + if (jobj) > + json_object_object_add(jdev, "ram_size", jobj); > + } > > if (flags & UTIL_JSON_HEALTH) { > jobj = util_cxl_memdev_health_to_json(memdev, flags); >
diff --git a/Documentation/cxl/cxl-list.txt b/Documentation/cxl/cxl-list.txt index 14a2b4bb5c2a..56229abcb053 100644 --- a/Documentation/cxl/cxl-list.txt +++ b/Documentation/cxl/cxl-list.txt @@ -70,7 +70,6 @@ configured. { "memdev":"mem0", "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":0, "serial":"0", "host":"0000:35:00.0" } @@ -88,7 +87,6 @@ EXAMPLE { "memdev":"mem0", "pmem_size":268435456, - "ram_size":0, "serial":0, "host":"0000:35:00.0" } @@ -101,7 +99,6 @@ EXAMPLE { "memdev":"mem0", "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":0, "serial":"0" } ] @@ -129,7 +126,6 @@ OPTIONS { "memdev":"mem0", "pmem_size":268435456, - "ram_size":0, "serial":0 }, { @@ -204,7 +200,6 @@ OPTIONS [ { "memdev":"mem0", - "pmem_size":0, "ram_size":273535729664, "partition_info":{ "total_size":273535729664, diff --git a/cxl/json.c b/cxl/json.c index 2f3639ede2f8..292e8428ccee 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -305,7 +305,7 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, { const char *devname = cxl_memdev_get_devname(memdev); struct json_object *jdev, *jobj; - unsigned long long serial; + unsigned long long serial, size; int numa_node; jdev = json_object_new_object(); @@ -316,13 +316,19 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, if (jobj) json_object_object_add(jdev, "memdev", jobj); - jobj = util_json_object_size(cxl_memdev_get_pmem_size(memdev), flags); - if (jobj) - json_object_object_add(jdev, "pmem_size", jobj); + size = cxl_memdev_get_pmem_size(memdev); + if (size) { + jobj = util_json_object_size(size, flags); + if (jobj) + json_object_object_add(jdev, "pmem_size", jobj); + } - jobj = util_json_object_size(cxl_memdev_get_ram_size(memdev), flags); - if (jobj) - json_object_object_add(jdev, "ram_size", jobj); + size = cxl_memdev_get_ram_size(memdev); + if (size) { + jobj = util_json_object_size(size, flags); + if (jobj) + json_object_object_add(jdev, "ram_size", jobj); + } if (flags & UTIL_JSON_HEALTH) { jobj = util_cxl_memdev_health_to_json(memdev, flags);
The typical case is that CXL devices are pure ram devices. Only emit capacity sizes when they are non-zero to avoid confusion around whether pmem is available via partitioning or not. The confusion being that a user may assign more meaning to the zero size value than it actually deserves. A zero value for either pmem or ram, doesn't indicate the devices capability for either mode. Use the -I option to cxl list to include paritition info in the memdev listing. That will explicitly show the ram and pmem capabilities of the device. Do the same for ram_size on the odd case that someone builds a pure pmem device. Cc: Alison Schofield <alison.schofield@intel.com> [alison: clarify changelog] Signed-off-by: Dan Williams <dan.j.williams@intel.com> --- Documentation/cxl/cxl-list.txt | 5 ----- cxl/json.c | 20 +++++++++++++------- 2 files changed, 13 insertions(+), 12 deletions(-)