From patchwork Fri Aug 4 09:08:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?R290b3UsIFlhc3Vub3JpL+S6lOWztiDlurfmloc=?= X-Patchwork-Id: 9880857 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 072D36031B for ; Fri, 4 Aug 2017 09:09:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EC34C28535 for ; Fri, 4 Aug 2017 09:09:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E08DD28866; Fri, 4 Aug 2017 09:09:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 245CE2899E for ; Fri, 4 Aug 2017 09:09:26 +0000 (UTC) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1196921D28FD3; Fri, 4 Aug 2017 02:06:26 -0700 (PDT) X-Original-To: linux-nvdimm@lists.01.org Delivered-To: linux-nvdimm@lists.01.org Received: from mgwym04.jp.fujitsu.com (mgwym04.jp.fujitsu.com [211.128.242.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 354C22095D9C2 for ; Fri, 4 Aug 2017 02:06:23 -0700 (PDT) Received: from yt-mxoi2.gw.nic.fujitsu.com (unknown [192.168.229.69]) by mgwym04.jp.fujitsu.com with smtp id 3ee6_95ca_db03d08f_5157_4b8f_9e2e_76475db96d1c; Fri, 04 Aug 2017 18:08:29 +0900 Received: from m3051.s.css.fujitsu.com (m3051.s.css.fujitsu.com [10.134.21.209]) by yt-mxoi2.gw.nic.fujitsu.com (Postfix) with ESMTP id AE0EAAC013E for ; Fri, 4 Aug 2017 18:08:28 +0900 (JST) X-SecurityPolicyCheck: OK by SHieldMailChecker v2.5.2 X-SHieldMailCheckerPolicyVersion: FJ-ISEC-20170217-enc X-SHieldMailCheckerMailID: 73478622af6640ab971c8ded0da987b4 Date: Fri, 04 Aug 2017 18:08:24 +0900 From: Yasunori Goto To: NVDIMM-ML Subject: [RFC/Patch 2/5] Support Translate SPA for NVDIMM Root Device. In-Reply-To: <20170804180231.27BC.E1E9C6FF@jp.fujitsu.com> References: <20170804180231.27BC.E1E9C6FF@jp.fujitsu.com> Message-Id: <20170804180822.27C4.E1E9C6FF@jp.fujitsu.com> MIME-Version: 1.0 X-Mailer: Becky! ver. 2.73 [ja] X-TM-AS-MML: disable X-BeenThere: linux-nvdimm@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: "Linux-nvdimm developer list." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linux-nvdimm-bounces@lists.01.org Sender: "Linux-nvdimm" X-Virus-Scanned: ClamAV using ClamSMTP Support Translate SPA for NVDIMM Root Device. ACPI 6.2 has new specification on _DSM of NVDIMM Root Device It is "Translate SPA" which translate from system physical address(SPA) to NVDIMM handle and dimm physical address(DPA). This patch is to support Translate SPA. Signed-off-by: Yasunori Goto --- drivers/acpi/nfit/core.c | 7 +++++-- drivers/nvdimm/bus.c | 11 ++++++++++- include/linux/libnvdimm.h | 2 +- include/uapi/linux/ndctl.h | 4 ++++ 4 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c index 5334755..e8c67a3 100644 --- a/drivers/acpi/nfit/core.c +++ b/drivers/acpi/nfit/core.c @@ -173,6 +173,8 @@ static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) if (clear_err->length > clear_err->cleared) return clear_err->cleared; return 0; + case ND_CMD_TRANS_SPA: + return 0; default: break; } @@ -352,7 +354,7 @@ int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, * Set fw_status for all the commands with a known format to be * later interpreted by xlat_status(). */ - if (i >= 1 && ((cmd >= ND_CMD_ARS_CAP && cmd <= ND_CMD_CLEAR_ERROR) + if (i >= 1 && ((cmd >= ND_CMD_ARS_CAP && cmd <= ND_CMD_TRANS_SPA) || (cmd >= ND_CMD_SMART && cmd <= ND_CMD_VENDOR))) fw_status = *(u32 *) out_obj->buffer.pointer; @@ -1644,7 +1646,7 @@ static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) if (!adev) return; - for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) + for (i = ND_CMD_ARS_CAP; i <= ND_CMD_TRANS_SPA; i++) if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) set_bit(i, &nd_desc->cmd_mask); set_bit(ND_CMD_CALL, &nd_desc->cmd_mask); @@ -1654,6 +1656,7 @@ static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) (1 << ND_CMD_ARS_START) | (1 << ND_CMD_ARS_STATUS) | (1 << ND_CMD_CLEAR_ERROR) | + (1 << ND_CMD_TRANS_SPA) | (1 << NFIT_CMD_ARS_INJECT_SET) | (1 << NFIT_CMD_ARS_INJECT_CLEAR) | (1 << NFIT_CMD_ARS_INJECT_GET); diff --git a/drivers/nvdimm/bus.c b/drivers/nvdimm/bus.c index 937fafa..ef05fe1 100644 --- a/drivers/nvdimm/bus.c +++ b/drivers/nvdimm/bus.c @@ -727,6 +727,12 @@ static const struct nd_cmd_desc __nd_cmd_bus_descs[] = { .out_num = 3, .out_sizes = { 4, 4, 8, }, }, + [ND_CMD_TRANS_SPA] = { + .in_num = 1, + .in_sizes = { 8, }, + .out_num = 7, + .out_sizes = { 2, 2, 1, 3, 8, 4, UINT_MAX, }, + }, [ND_CMD_CALL] = { .in_num = 2, .in_sizes = { sizeof(struct nd_cmd_pkg), UINT_MAX, }, @@ -801,7 +807,9 @@ u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, if (out_field[1] - 8 == remainder) return remainder; return out_field[1] - 4; - } else if (cmd == ND_CMD_CALL) { + } else if (!nvdimm && cmd == ND_CMD_TRANS_SPA && idx == 6) + return out_field[2]; + else if (cmd == ND_CMD_CALL) { struct nd_cmd_pkg *pkg = (struct nd_cmd_pkg *) in_field; return pkg->nd_size_out; @@ -947,6 +955,7 @@ static int __nd_ioctl(struct nvdimm_bus *nvdimm_bus, struct nvdimm *nvdimm, case ND_CMD_SET_CONFIG_DATA: case ND_CMD_ARS_START: case ND_CMD_CLEAR_ERROR: + case ND_CMD_TRANS_SPA: case ND_CMD_CALL: dev_dbg(&nvdimm_bus->dev, "'%s' command while read-only.\n", nvdimm ? nvdimm_cmd_name(cmd) diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h index f3d3e6a..c179ed0 100644 --- a/include/linux/libnvdimm.h +++ b/include/linux/libnvdimm.h @@ -29,7 +29,7 @@ enum { /* need to set a limit somewhere, but yes, this is likely overkill */ ND_IOCTL_MAX_BUFLEN = SZ_4M, - ND_CMD_MAX_ELEM = 5, + ND_CMD_MAX_ELEM = 7, ND_CMD_MAX_ENVELOPE = 256, ND_MAX_MAPPINGS = 32, diff --git a/include/uapi/linux/ndctl.h b/include/uapi/linux/ndctl.h index 6d3c542..91bf129 100644 --- a/include/uapi/linux/ndctl.h +++ b/include/uapi/linux/ndctl.h @@ -190,6 +190,7 @@ enum { ND_CMD_ARS_START = 2, ND_CMD_ARS_STATUS = 3, ND_CMD_CLEAR_ERROR = 4, + ND_CMD_TRANS_SPA = 5, /* per-dimm commands */ ND_CMD_SMART = 1, @@ -218,6 +219,7 @@ static inline const char *nvdimm_bus_cmd_name(unsigned cmd) [ND_CMD_ARS_START] = "ars_start", [ND_CMD_ARS_STATUS] = "ars_status", [ND_CMD_CLEAR_ERROR] = "clear_error", + [ND_CMD_TRANS_SPA] = "trans_spa", [ND_CMD_CALL] = "cmd_call", }; @@ -280,6 +282,8 @@ static inline const char *nvdimm_cmd_name(unsigned cmd) #define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\ struct nd_cmd_clear_error) +#define ND_IOCTL_TRANS_SPA _IOWR(ND_IOCTL, ND_CMD_TRANS_SPA,\ + struct nd_cmd_trans_spa) #define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */ #define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */