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[193.106.246.138]) by smtp.gmail.com with ESMTPSA id v10sm692581ljg.113.2020.07.02.07.19.06 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Jul 2020 07:19:07 -0700 (PDT) From: Grzegorz Jaszczyk To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, s-anna@ti.com Cc: grzegorz.jaszczyk@linaro.org, robh+dt@kernel.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, david@lechnology.com, wmills@ti.com Subject: [PATCHv3 0/6] Add TI PRUSS Local Interrupt Controller IRQChip driver Date: Thu, 2 Jul 2020 16:17:53 +0200 Message-Id: <1593699479-1445-1-git-send-email-grzegorz.jaszczyk@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Hi All, The following is a v3 version of the series [1][2] that adds an IRQChip driver for the local interrupt controller present within a Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) present on a number of TI SoCs including OMAP architecture based AM335x, AM437x, AM57xx SoCs, Keystone 2 architecture based 66AK2G SoCs, Davinci architecture based OMAP-L138/DA850 SoCs and the latest K3 architecture based AM65x and J721E SoCs. Please see the v1 cover-letter [1] for details about the features of this interrupt controller. More details can be found in any of the supported SoC TRMs. Eg: Chapter 30.1.6 of AM5728 TRM [3] Please see the individual patches for exact changes in each patch, following are the main changes from v2: - Convert dt-binding to YAML (patch #1). - Address comments from Marc Zyngier regarding patch #2 and update following patches due to those changes. - Dropped the custom helper functions used for interrupt configuration outside of irq driver [4]. Introduce new patch (patch 6) which uses xlate and irq domain mapping functionality in order to map system event through 2 levels of many-to-one mapping i.e. events to channel mapping and channels to host interrupts. [1] https://patchwork.kernel.org/cover/11034561/ [2] https://patchwork.kernel.org/cover/11069749/ [3] http://www.ti.com/lit/pdf/spruhz6 [4] https://patchwork.kernel.org/patch/11069751/ Best regards Grzegorz David Lechner (1): irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Grzegorz Jaszczyk (1): irqchip/irq-pruss-intc: Add event mapping support Suman Anna (4): dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts irqchip/irq-pruss-intc: Add support for shared and invalid interrupts irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs .../interrupt-controller/ti,pruss-intc.yaml | 135 ++++ drivers/irqchip/Kconfig | 10 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-pruss-intc.c | 717 +++++++++++++++++++++ 4 files changed, 863 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml create mode 100644 drivers/irqchip/irq-pruss-intc.c