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Fri, 9 Oct 2020 07:56:41 +0000 Date: Fri, 9 Oct 2020 15:53:11 +0800 From: Jisheng Zhang To: Kishon Vijay Abraham I , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , Jingoo Han , Gustavo Pimentel Cc: linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 0/2] PCI: dwc: fix two MSI issues Message-ID: <20201009155311.22d3caa5@xhacker.debian> X-Mailer: Claws Mail 3.17.6 (GTK+ 2.24.32; x86_64-pc-linux-gnu) X-Originating-IP: [124.74.246.114] X-ClientProxiedBy: TY1PR01CA0164.jpnprd01.prod.outlook.com (2603:1096:402::16) To DM6PR03MB4555.namprd03.prod.outlook.com (2603:10b6:5:102::17) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from xhacker.debian (124.74.246.114) by TY1PR01CA0164.jpnprd01.prod.outlook.com (2603:1096:402::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3455.22 via Frontend Transport; Fri, 9 Oct 2020 07:56:38 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e0631e0b-2b03-417a-b0b6-08d86c28dbba X-MS-TrafficTypeDiagnostic: DM5PR03MB2683: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2089; 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One to skip PCIE_MSI_INTR0* programming if MSI is disabled, another to use an address in the driver data for MSI address, to fix the MSI page leakage during suspend/resume. Since v6: - Keep the IS_ENABLED(CONFIG_PCI_MSI) check in dw_pcie_msi_init(). Since v5: - rebase on pci/dwc branch - add Acked-by tag Since v4: - fix pci-dra7xx.c Since v3: - add Acked-by tag - change patch2 commit msg to make it clear - map the MSI msg with dma_map_single_attrs() for some platforms which either has separate addrs for dma and phy or has mem access limitation for the PCIe. Since v2: - add Acked-by tag - use an address in the driver data for MSI address. Thank Ard and Rob for pointing out this correct direction. - Since the MSI page has gone, the leak issue doesn't exist anymore, remove unnecessary patches. - Remove dw_pcie_free_msi rename and the last patch. They could be targeted to next. So will send out patches in a separate series. Since v1: - add proper error handling patches. - solve the msi page leakage by moving dw_pcie_msi_init() from each users to designware host Jisheng Zhang (2): PCI: dwc: Skip PCIE_MSI_INTR0* programming if MSI is disabled PCI: dwc: Fix MSI page leakage in suspend/resume drivers/pci/controller/dwc/pci-dra7xx.c | 18 +++++++++- .../pci/controller/dwc/pcie-designware-host.c | 35 ++++++++++--------- drivers/pci/controller/dwc/pcie-designware.h | 2 +- 3 files changed, 37 insertions(+), 18 deletions(-)