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Niedermayr" To: , CC: , , , Subject: [PATCH v2 0/3] omap-gpmc wait pin additions Date: Fri, 2 Sep 2022 11:10:25 +0200 Message-ID: <20220902091028.1346952-1-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [139.21.146.191] X-ClientProxiedBy: DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) To DEMCHDC8WAA.ad011.siemens.net (139.25.226.104) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2c220124-acf9-42ff-ddbb-08da8cc30b30 X-MS-TrafficTypeDiagnostic: VI1PR10MB3341:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: /EvneLEmN6zlwx7bw/GFi8kqoV8rqgdVgQTBiC39+uGIEtG5wwe2s4n4RPttvgjMR5wEgSkcSbegLQGPSJxxAVhi10mxN+ncv5vR8er7BaHfnXoQfF0pT+TR1lzmdQym4VbRcnHJuHJO7VTuGeZCd6M2PVXfjYc+cpBf3bcHdtkX5/sMWvUMYuH/i9AHWj6UVo3SvTnfZy7/c1NmBmHj/afr2rKFZrJ5Xme0cnS0zFBzHjCl+nPbN5rGlzrJwEY5fYhvhMHWB/p++FB4IRNvbamcCI8EoCVpy1ywZ760sBQiPNZ71UhUbjhQzLwrzbFSyb0Hz5Lj1wvcepfhkCa4RBLfZaukeMQyDVQyXcSaseRyfLg5kN5vsBdkVbYJbmCY5sdGdI+xn6Dc1U0sd9/TBdGIma4b0kZ3BQ6Zl88i9J/wOK/hmnyjTq02bfTRIYduYujOGM6kJWQzdLNKNdJktpljV8nmUUgG0hZla6/4QKc+wrrgR+5JxM67eqUaD4iE1R0ccpl8LivI29V6kG5oZIZqwImRG5pqdtYmWCmq5okeLPfY0EuM/UlSZAE1DLm9TdPC1Zpp4hyqknFqGQYY9ce+d8p2jt1lw92sMHc7rK98WA+GKR+V5blmcIUMvOsEyomP/zvBH+LKCi3nbThWVMehuDbWMk7/ebwvb2ztgQyxWzXq3Xu60hwrbS40x4y1JcdQ2BwtO6xCS+OFeGPhTuBYbB/MiFLtydx3/1wp9i62+wc+xyYVvurtP5EUTCFBrH7DeP4Gm0U5wA79znhFHjFK/VHyT8njCgfM2zV0U6c= X-Forefront-Antispam-Report: CIP:194.138.21.75;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(396003)(376002)(39860400002)(346002)(136003)(40470700004)(46966006)(36840700001)(41300700001)(6666004)(478600001)(40480700001)(316002)(36756003)(26005)(82310400005)(110136005)(54906003)(356005)(16526019)(86362001)(81166007)(82960400001)(2906002)(336012)(2616005)(47076005)(956004)(1076003)(83380400001)(186003)(4326008)(5660300002)(8936002)(8676002)(70586007)(70206006)(36860700001)(40460700003)(82740400003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Sep 2022 09:10:56.0141 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2c220124-acf9-42ff-ddbb-08da8cc30b30 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.75];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR01FT033.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR10MB3341 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr There is currently no possibility for the gpmc to set either the waitp-pin polarity or use the same wait-pin for different cs-regions. While the current implementation may fullfill most usecases, it may not be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where more complex interfacing options where possible. For example interfacing an ASIC which offers multiple cs-regions but only one waitpin the current driver and dt-bindings are not sufficient. While using the same waitpin for different cs-regions worked for older kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with newer kernels (>5.10). Changes since v1: * Rebase against recent 6.0.0-rc3 kernel, but the maintainers list stays the same! ./scripts/get_maintainer.pl drivers/memory/omap-gpmc.c Roger Quadros (maintainer:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT) Tony Lindgren (maintainer:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT) Krzysztof Kozlowski (maintainer:MEMORY CONTROLLER DRIVERS) linux-omap@vger.kernel.org (open list:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT) linux-kernel@vger.kernel.org (open list:MEMORY CONTROLLER DRIVERS) ./scripts/get_maintainer.pl Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml Krzysztof Kozlowski (maintainer:MEMORY CONTROLLER DRIVERS) Rob Herring (maintainer:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Tony Lindgren (in file) Roger Quadros (in file) linux-kernel@vger.kernel.org (open list:MEMORY CONTROLLER DRIVERS) devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Benedikt Niedermayr (3): memory: omap-gpmc: allow shared wait pins memory: omap-gpmc: add support for wait pin polarity dt-bindings: memory-controllers: gpmc-child: Add binding for wait-pin-polarity .../memory-controllers/ti,gpmc-child.yaml | 7 ++++ drivers/memory/omap-gpmc.c | 38 +++++++++++++++---- include/linux/platform_data/gpmc-omap.h | 1 + 3 files changed, 39 insertions(+), 7 deletions(-)