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Niedermayr" To: , CC: , , , Subject: [PATCH v3 0/3] omap-gpmc wait pin additions Date: Tue, 6 Sep 2022 14:47:42 +0200 Message-ID: <20220906124747.1767318-1-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [139.23.126.196] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a3f89ede-a2cd-47a2-2350-08da900607e4 X-MS-TrafficTypeDiagnostic: VE1PR10MB3902:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: WqG0Iaiyr0hYAK3xmqoEV/D8PDsWQfKZmZvoeBMEWIdmURfXy56UQtPHHu6pcn91gLKxDreeIvDe0OcJSIxBCPFxk7sGS0nlE7bV8q/TzTlyT60gDyaJYg/9E8XtdB7RlTYLBd/FhxzvIFdd1//btB92POX00o+rpMedSn1aQFDy9EkzOa8nPCUkgv55V1DtneqR8Wfk0WPLohqZKd89NqV+G/RwjWG3aCFeACB7rFSilfnQlmpyQQ7WfhQQpUv146c+JFniKlV/M8q0DfkmJxmUG2DGWKCAxJ/t+7CrCZycyxwjeMdyNMLhaid00N0wAq6fBQ6oUwXzAZYHNOnl7yYkiM9+ZjnqNvSfirFtLQP0rZ0zsaXiN5HZRSMbyjjjzRTY7C9kQ+V980h0Zz7dPSUG3A6Yr5QG61CW1aALpqgsZEBNdrIQ/M5Zpf03M526zFIeN2l+sQPqCH+qqWI2+m1DjBG587vdL2z199ABaxmGBORKIffAAyzfZ+/qmUlitItprZ0mU34aCclOxijG0MpmNU7mzc3f4+I6CgUAnhnWUW9p+eb5Lucv+fzcWcrjyZP1YknIIVNTmHyVXm+nb0NNWs9mYYAvKaA48UOWoMrYey//vihf5kRenXB1mPEwQbV7LjMLWifwpHrlRMFKEkA6EhzcSe4JIs2gD+1h2GeeumRwGZmK8ymupS1/WAEb6/2R7N5Vv7MbOTwDc0daMsXfH+JVnnC+E5TWdbl43QYvB32gIB97H5o47v36FkZP3wYMPjXIuvYCLzZpEpNMdL2V0X728nE/Vb/vGxGgTmY= X-Forefront-Antispam-Report: CIP:194.138.21.76;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(396003)(346002)(39860400002)(376002)(136003)(40470700004)(36840700001)(46966006)(8676002)(70586007)(36860700001)(5660300002)(478600001)(4326008)(47076005)(81166007)(8936002)(70206006)(83380400001)(41300700001)(4743002)(26005)(6666004)(2906002)(356005)(86362001)(40460700003)(82960400001)(16526019)(82310400005)(82740400003)(956004)(40480700001)(336012)(316002)(36756003)(110136005)(54906003)(2616005)(1076003)(186003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Sep 2022 12:48:00.1848 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a3f89ede-a2cd-47a2-2350-08da900607e4 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.76];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT090.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR10MB3902 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Currently it is not possible to configure the WAIT0PINPOLARITY and WAIT1PINPOLARITY bits of the GPMC_CONFIG register directly via device tree properties. It is also not possible to use the same wait-pin for different cs-regions. While the current implementation may fullfill most usecases, it may not be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where more complex interfacing options where possible. For example interfacing an ASIC which offers multiple cs-regions but only one waitpin the current driver and dt-bindings are not sufficient. While using the same waitpin for different cs-regions worked for older kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with newer kernels (>5.10). Changes since v1: * Rebase against recent 6.0.0-rc3 kernel, but the maintainers list stays the same! * Updated eMail recipients list * Remove the gpmc register configuration out of the gpiochip callbacks. In this case the memory interface configuration is not done via gpio bindings. * Some minor code fixes * Changed git commit descriptions Benedikt Niedermayr (3): memory: omap-gpmc: allow shared wait pins memory: omap-gpmc: add support for wait pin polarity dt-bindings: memory-controllers: gpmc-child: add wait-pin polarity .../memory-controllers/ti,gpmc-child.yaml | 6 +++++ drivers/memory/omap-gpmc.c | 23 +++++++++++++++++-- include/linux/platform_data/gpmc-omap.h | 1 + 3 files changed, 28 insertions(+), 2 deletions(-)