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Niedermayr" To: , CC: , , , Subject: [PATCH v4 0/3] omap-gpmc wait pin additions Date: Thu, 15 Sep 2022 11:13:30 +0200 Message-ID: <20220915091333.2425306-1-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [144.145.220.66] X-ClientProxiedBy: DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB5EUR01FT034:EE_|PAVPR10MB7115:EE_ X-MS-Office365-Filtering-Correlation-Id: daed6ec1-d7f6-4fff-8717-08da96fa96b0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wEEea+qt4S6Th4WgrC5gKZNvOYpW9rq3JcbOQPI5LhzfvVHeILR5Jw1a/ZX/yHqjGUzNdnLzJzOMM5d7o+oYMchBF7PJZqtN9SefGh8mizKeJ/vyPtnya23QbwtV8VByD6eUZcStrqZblFBse17UD/r4Sf1wCqrXw/tESsEdIYUaMnuT5NFJdPxKQ9dOTh2Ce4br9rhxpUpLbSC4HRRQWiCASuP3YYAzeJJiPjRxjGVgPmY6XKq95ljzvo07irx4waq0pPjxnfb/UGXtTnhYZQTWBmVxrhodUBCUWKBEwZq6wGbHe8DFJRvyvMHEE/HCoH2dAgKuI2cnSGbth1861jGQYG19fwhsU/3uhy/FcWbMKi7QJ0RpylyLnAid0iRk9IdW+NVYuaD3xthjjYjpjZuxvvLvhM7i7GQ26ntYPudguQOrKtVAkuw8Y0jyB9g2ZzT4gOgHaWkkS0a2a9DfbKVJ21MJdZszPRfigxMUk6EfdiKYb650lm4fbptDIL/8qxsaM7t99qlfjEFJxbRLDyjf2le//eB75riNwUOaIHwnl/2UNvupNqmXZfsEul5JT2E4TfUGSXTxe+7GqMO0RVM7IOrxcbqP4J8jpolrli0ZZBA0B+oilJwIjB/ydUC4uo9GPBZQajF/G+T6+orJ+DC2CS95Z8ho+L3oIXgZR6NIxoYLHuZpHO8zDLzwEek+zlYu/3o8VdyKpoBUFa5bcOdvK5C8ijf0B78tEBnWC3g/Ds79NTNW/OKZKUGRAWiFOuqbEMRzEEOR/iOhkz3rWdFZ/KOc22zTKCTn9ZjkcIA= X-Forefront-Antispam-Report: CIP:194.138.21.76;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(396003)(39860400002)(376002)(136003)(451199015)(36840700001)(46966006)(40470700004)(82960400001)(81166007)(110136005)(4326008)(316002)(26005)(54906003)(86362001)(4743002)(356005)(40460700003)(5660300002)(478600001)(6666004)(8676002)(36860700001)(82310400005)(36756003)(956004)(2616005)(1076003)(82740400003)(186003)(40480700001)(8936002)(70206006)(47076005)(70586007)(16526019)(83380400001)(41300700001)(336012)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2022 09:13:43.9706 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: daed6ec1-d7f6-4fff-8717-08da96fa96b0 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.76];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR01FT034.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAVPR10MB7115 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Currently it is not possible to configure the WAIT0PINPOLARITY and WAIT1PINPOLARITY bits of the GPMC_CONFIG register directly via device tree properties. It is also not possible to use the same wait-pin for different cs-regions. While the current implementation may fullfill most usecases, it may not be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where more complex interfacing options where possible. For example interfacing an ASIC which offers multiple cs-regions but only one waitpin the current driver and dt-bindings are not sufficient. While using the same waitpin for different cs-regions worked for older kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with newer kernels (>5.10). Changes since v1: * Rebase against recent 6.0.0-rc3 kernel, but the maintainers list stays the same! * Updated eMail recipients list Changes since v2: * Remove the gpmc register configuration out of the gpiochip callbacks. In this case the memory interface configuration is not done via gpio bindings. * Some minor code fixes * Changed git commit descriptions Change since v3: * Use a uint32 dt-property instean a boolean one * If the dt-property is not set, then don't touch the GPMC_CONFIG register * Changed git commit descriptions Benedikt Niedermayr (3): memory: omap-gpmc: allow shared wait pins memory: omap-gpmc: add support for wait pin polarity dt-bindings: memory-controllers: gpmc-child: add wait-pin polarity .../memory-controllers/ti,gpmc-child.yaml | 7 +++++ drivers/memory/omap-gpmc.c | 30 +++++++++++++++++-- include/linux/platform_data/gpmc-omap.h | 6 ++++ 3 files changed, 41 insertions(+), 2 deletions(-)