From patchwork Wed Jul 15 14:56:31 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ameya Palande X-Patchwork-Id: 35702 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n6FEv4qM024909 for ; Wed, 15 Jul 2009 14:57:04 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754936AbZGOO45 (ORCPT ); Wed, 15 Jul 2009 10:56:57 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755221AbZGOO45 (ORCPT ); Wed, 15 Jul 2009 10:56:57 -0400 Received: from smtp.nokia.com ([192.100.122.233]:35450 "EHLO mgw-mx06.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754936AbZGOO44 (ORCPT ); Wed, 15 Jul 2009 10:56:56 -0400 Received: from esebh105.NOE.Nokia.com (esebh105.ntc.nokia.com [172.21.138.211]) by mgw-mx06.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id n6FEuXvZ007360; Wed, 15 Jul 2009 17:56:43 +0300 Received: from vaebh104.NOE.Nokia.com ([10.160.244.30]) by esebh105.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 15 Jul 2009 17:56:40 +0300 Received: from mgw-sa01.ext.nokia.com ([147.243.1.47]) by vaebh104.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 15 Jul 2009 17:56:40 +0300 Received: from localhost.localdomain (esdhcp04048.research.nokia.com [172.21.40.48]) by mgw-sa01.ext.nokia.com (Switch-3.2.6/Switch-3.2.6) with ESMTP id n6FEuQeb018779; Wed, 15 Jul 2009 17:56:38 +0300 From: Ameya Palande To: linux-omap@vger.kernel.org Cc: omar.ramirez@ti.com, x0095840@ti.com, nm@ti.com, hiroshi.doyu@nokia.com Subject: [PATCH 08/13] DSPBRIDGE: Prevent memory access during hibernation Date: Wed, 15 Jul 2009 17:56:31 +0300 Message-Id: <1247669795-23895-9-git-send-email-ameya.palande@nokia.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: <1247669795-23895-8-git-send-email-ameya.palande@nokia.com> References: <1247669795-23895-1-git-send-email-ameya.palande@nokia.com> <1247669795-23895-2-git-send-email-ameya.palande@nokia.com> <1247669795-23895-3-git-send-email-ameya.palande@nokia.com> <1247669795-23895-4-git-send-email-ameya.palande@nokia.com> <1247669795-23895-5-git-send-email-ameya.palande@nokia.com> <1247669795-23895-6-git-send-email-ameya.palande@nokia.com> <1247669795-23895-7-git-send-email-ameya.palande@nokia.com> <1247669795-23895-8-git-send-email-ameya.palande@nokia.com> X-OriginalArrivalTime: 15 Jul 2009 14:56:40.0445 (UTC) FILETIME=[75C4EAD0:01CA055C] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org If DSP is in hibernated then WakeDSP() returns without waking it up, which results in flush_all function access IVA MMU while IVA is hibernated. [Hiroshi DOYU: split the original to logical ones] Signed-off-by: Ameya Palande Acked-by: Omar Ramirez Luna --- drivers/dsp/bridge/wmd/tiomap3430_pwr.c | 65 +++++++++++-------------------- drivers/dsp/bridge/wmd/tiomap_sm.c | 32 +++++++-------- 2 files changed, 38 insertions(+), 59 deletions(-) diff --git a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c index a725548..7cc29b7 100644 --- a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c +++ b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c @@ -295,59 +295,40 @@ DSP_STATUS SleepDSP(struct WMD_DEV_CONTEXT *pDevContext, IN u32 dwCmd, */ DSP_STATUS WakeDSP(struct WMD_DEV_CONTEXT *pDevContext, IN void *pArgs) { - DSP_STATUS status = DSP_SOK; #ifdef CONFIG_PM - struct CFG_HOSTRES resources; + DSP_STATUS status = DSP_SOK; +#ifdef CONFIG_BRIDGE_DEBUG enum HW_PwrState_t pwrState; - u32 temp; + struct CFG_HOSTRES resources; status = CFG_GetHostResources( (struct CFG_DEVNODE *)DRV_GetFirstDevExtension(), &resources); if (DSP_FAILED(status)) return status; - /* check the BRD/WMD state, if it is not 'SLEEP' then return failure */ +#endif /* CONFIG_BRIDGE_DEBUG */ + + /* Check the BRD/WMD state, if it is not 'SLEEP' then return failure */ if (pDevContext->dwBrdState == BRD_RUNNING || - pDevContext->dwBrdState == BRD_STOPPED || - pDevContext->dwBrdState == BRD_DSP_HIBERNATION) { + pDevContext->dwBrdState == BRD_STOPPED) { /* The Device is in 'RET' or 'OFF' state and WMD state is not * 'SLEEP', this means state inconsistency, so return */ - status = DSP_SOK; - return status; - } - /* Enable the DSP peripheral clocks and load monitor timer - * before waking the DSP */ - DBG_Trace(DBG_LEVEL6, "WakeDSP: enable DSP Peripheral Clks = 0x%x \n", - pDevContext->uDspPerClks); - status = DSP_PeripheralClocks_Enable(pDevContext, NULL); - - /* Enabling Dppll in lock mode */ - temp = (u32) *((REG_UWORD32 *) - ((u32) (resources.dwCmBase) + 0x34)); - temp = (temp & 0xFFFFFFFE) | 0x1; - *((REG_UWORD32 *) ((u32) (resources.dwCmBase) + 0x34)) = - (u32) temp; - temp = (u32) *((REG_UWORD32 *) - ((u32) (resources.dwCmBase) + 0x4)); - temp = (temp & 0xFFFFFC8) | 0x37; - - *((REG_UWORD32 *) ((u32) (resources.dwCmBase) + 0x4)) = - (u32) temp; - - udelay(10); - if (DSP_SUCCEEDED(status)) { - /* Send a message to DSP to wake up */ - CHNLSM_InterruptDSP2(pDevContext, MBX_PM_DSPWAKEUP); - HW_PWR_IVA2StateGet(resources.dwPrmBase, HW_PWR_DOMAIN_DSP, - &pwrState); - DBG_Trace(DBG_LEVEL7, - "\nWakeDSP: Power State After sending Interrupt " - "to DSP %x\n", pwrState); - /* set the device state to RUNNIG */ - pDevContext->dwBrdState = BRD_RUNNING; - } else { - DBG_Trace(DBG_LEVEL6, "WakeDSP: FAILED\n"); + return DSP_SOK; } -#endif + + /* Send a wakeup message to DSP */ + CHNLSM_InterruptDSP2(pDevContext, MBX_PM_DSPWAKEUP); + +#ifdef CONFIG_BRIDGE_DEBUG + HW_PWR_IVA2StateGet(resources.dwPrmBase, HW_PWR_DOMAIN_DSP, + &pwrState); + DBG_Trace(DBG_LEVEL7, + "\nWakeDSP: Power State After sending Interrupt " + "to DSP %x\n", pwrState); +#endif /* CONFIG_BRIDGE_DEBUG */ + + /* Set the device state to RUNNIG */ + pDevContext->dwBrdState = BRD_RUNNING; +#endif /* CONFIG_PM */ return status; } diff --git a/drivers/dsp/bridge/wmd/tiomap_sm.c b/drivers/dsp/bridge/wmd/tiomap_sm.c index a6d5d62..b5d3d6d 100644 --- a/drivers/dsp/bridge/wmd/tiomap_sm.c +++ b/drivers/dsp/bridge/wmd/tiomap_sm.c @@ -126,24 +126,22 @@ DSP_STATUS CHNLSM_InterruptDSP2(struct WMD_DEV_CONTEXT *pDevContext, if (pDevContext->dwBrdState == BRD_DSP_HIBERNATION || pDevContext->dwBrdState == BRD_HIBERNATION) { + /* Restart the peripheral clocks */ + DSP_PeripheralClocks_Enable(pDevContext, NULL); + /* Restore mailbox settings */ - /* Restart the peripheral clocks that were disabled only - * in DSP initiated Hibernation case.*/ - if (pDevContext->dwBrdState == BRD_DSP_HIBERNATION) { - DSP_PeripheralClocks_Enable(pDevContext, NULL); - /* Enabling Dpll in lock mode*/ - temp = (u32) *((REG_UWORD32 *) - ((u32) (resources.dwCmBase) + 0x34)); - temp = (temp & 0xFFFFFFFE) | 0x1; - *((REG_UWORD32 *) ((u32) (resources.dwCmBase) + 0x34)) = - (u32) temp; - temp = (u32) *((REG_UWORD32 *) - ((u32) (resources.dwCmBase) + 0x4)); - temp = (temp & 0xFFFFFC8) | 0x37; - - *((REG_UWORD32 *) ((u32) (resources.dwCmBase) + 0x4)) = - (u32) temp; - } + /* Enabling Dpll in lock mode*/ + temp = (u32) *((REG_UWORD32 *) + ((u32) (resources.dwCmBase) + 0x34)); + temp = (temp & 0xFFFFFFFE) | 0x1; + *((REG_UWORD32 *) ((u32) (resources.dwCmBase) + 0x34)) = + (u32) temp; + temp = (u32) *((REG_UWORD32 *) + ((u32) (resources.dwCmBase) + 0x4)); + temp = (temp & 0xFFFFFC8) | 0x37; + + *((REG_UWORD32 *) ((u32) (resources.dwCmBase) + 0x4)) = + (u32) temp; HW_MBOX_restoreSettings(resources.dwMboxBase); /* Access MMU SYS CONFIG register to generate a short wakeup */