From patchwork Wed Jul 29 13:16:33 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 38146 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n6TDHaDC016621 for ; Wed, 29 Jul 2009 13:17:36 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754331AbZG2NRd (ORCPT ); Wed, 29 Jul 2009 09:17:33 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1754701AbZG2NRd (ORCPT ); Wed, 29 Jul 2009 09:17:33 -0400 Received: from smtp.nokia.com ([192.100.122.233]:47706 "EHLO mgw-mx06.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754331AbZG2NRc (ORCPT ); Wed, 29 Jul 2009 09:17:32 -0400 Received: from vaebh105.NOE.Nokia.com (vaebh105.europe.nokia.com [10.160.244.31]) by mgw-mx06.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id n6TDH0J1013374; Wed, 29 Jul 2009 16:17:18 +0300 Received: from vaebh104.NOE.Nokia.com ([10.160.244.30]) by vaebh105.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 29 Jul 2009 16:16:52 +0300 Received: from mgw-da02.ext.nokia.com ([147.243.128.26]) by vaebh104.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 29 Jul 2009 16:16:51 +0300 Received: from localhost.localdomain ([172.21.36.101]) by mgw-da02.ext.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id n6TDGil1015344; Wed, 29 Jul 2009 16:16:45 +0300 From: Roger Quadros To: khilman@deeprootsystems.com Cc: linux-omap@vger.kernel.org Subject: [RFC][PATCH] OMAP3: PM: Fix workaround implementation for OMAP3 errata (1.142) Date: Wed, 29 Jul 2009 16:16:33 +0300 Message-Id: <1248873393-29503-1-git-send-email-ext-roger.quadros@nokia.com> X-Mailer: git-send-email 1.6.0.4 X-OriginalArrivalTime: 29 Jul 2009 13:16:52.0271 (UTC) FILETIME=[D65293F0:01CA104E] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org As per errata 1.142, on EMU/HS devices, SDRC_POWER should be programmed for automatic self-refresh before transition to OFF mode. In the current implementation this is done in omap3_scratchpad_contents() which is wrong, since this is the value that will be restored while resuming from OFF mode and not while transitioning to it. This patch implements the workaround in the correct way as per errata. Signed-off-by: Roger Quadros --- arch/arm/mach-omap2/control.c | 16 ++-------------- arch/arm/mach-omap2/pm34xx.c | 20 ++++++++++++++------ 2 files changed, 16 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index a7159a9..0a563c8 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -272,20 +272,8 @@ void omap3_save_scratchpad_contents(void) (sdrc_read_reg(SDRC_ERR_TYPE) & 0xFFFF); sdrc_block_contents.dll_a_ctrl = sdrc_read_reg(SDRC_DLLA_CTRL); sdrc_block_contents.dll_b_ctrl = 0x0; - /* - * Due to a OMAP3 errata (1.142), on EMU/HS devices SRDC should - * be programed to issue automatic self refresh on timeout - * of AUTO_CNT = 1 prior to any transition to OFF mode. - */ - if ((omap_type() != OMAP2_DEVICE_TYPE_GP) - && (omap_rev() >= OMAP3430_REV_ES3_0)) - sdrc_block_contents.power = (sdrc_read_reg(SDRC_POWER) & - ~(SDRC_POWER_AUTOCOUNT_MASK| - SDRC_POWER_CLKCTRL_MASK)) | - (1 << SDRC_POWER_AUTOCOUNT_SHIFT) | - SDRC_SELF_REFRESH_ON_AUTOCOUNT; - else - sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER); + + sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER); sdrc_block_contents.cs_0 = 0x0; sdrc_block_contents.mcfg_0 = sdrc_read_reg(SDRC_MCFG_0); diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 14f10bc..eb3c9e5 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -405,15 +405,23 @@ void omap_sram_idle(void) } /* - * On EMU/HS devices ROM code restores a SRDC value - * from scratchpad which has automatic self refresh on timeout - * of AUTO_CNT = 1 enabled. This takes care of errata 1.142. - * Hence store/restore the SDRC_POWER register here. - */ + * Due to a OMAP3 errata (1.142), on EMU/HS devices SRDC should + * be programed to issue automatic self refresh on timeout + * of AUTO_CNT = 1 prior to any transition to OFF mode. + */ + if (omap_rev() >= OMAP3430_REV_ES3_0 && omap_type() != OMAP2_DEVICE_TYPE_GP && - core_next_state == PWRDM_POWER_OFF) + core_next_state == PWRDM_POWER_OFF) { + sdrc_pwr = sdrc_read_reg(SDRC_POWER); + sdrc_write_reg((sdrc_pwr & + ~(SDRC_POWER_AUTOCOUNT_MASK| + SDRC_POWER_CLKCTRL_MASK)) | + (1 << SDRC_POWER_AUTOCOUNT_SHIFT) | + SDRC_SELF_REFRESH_ON_AUTOCOUNT, + SDRC_POWER); + } if (regset_save_on_suspend) pm_dbg_regset_save(1);