@@ -100,41 +100,41 @@ static struct prm_setup_vc prm_setup = {
};
struct omap_opp omap3_mpu_rate_table[] = {
- {0, 0, 0},
+ {0, 0, 0, 0},
/*OPP1*/
- {S125M, VDD1_OPP1, 0x1E},
+ {true, S125M, VDD1_OPP1, 0x1E, true},
/*OPP2*/
- {S250M, VDD1_OPP2, 0x26},
+ {true, S250M, VDD1_OPP2, 0x26},
/*OPP3*/
- {S500M, VDD1_OPP3, 0x30},
+ {true, S500M, VDD1_OPP3, 0x30},
/*OPP4*/
- {S550M, VDD1_OPP4, 0x36},
+ {true, S550M, VDD1_OPP4, 0x36},
/*OPP5*/
- {S600M, VDD1_OPP5, 0x3C},
+ {true, S600M, VDD1_OPP5, 0x3C},
};
struct omap_opp omap3_l3_rate_table[] = {
- {0, 0, 0},
+ {0, 0, 0, 0},
/*OPP1*/
- {0, VDD2_OPP1, 0x1E},
+ {false, 0, VDD2_OPP1, 0x1E},
/*OPP2*/
- {S83M, VDD2_OPP2, 0x24},
+ {true, S83M, VDD2_OPP2, 0x24},
/*OPP3*/
- {S166M, VDD2_OPP3, 0x2C},
+ {true, S166M, VDD2_OPP3, 0x2C},
};
struct omap_opp omap3_dsp_rate_table[] = {
- {0, 0, 0},
+ {0, 0, 0, 0},
/*OPP1*/
- {S90M, VDD1_OPP1, 0x1E},
+ {true, S90M, VDD1_OPP1, 0x1E},
/*OPP2*/
- {S180M, VDD1_OPP2, 0x26},
+ {true, S180M, VDD1_OPP2, 0x26},
/*OPP3*/
- {S360M, VDD1_OPP3, 0x30},
+ {true, S360M, VDD1_OPP3, 0x30},
/*OPP4*/
- {S400M, VDD1_OPP4, 0x36},
+ {true, S400M, VDD1_OPP4, 0x36},
/*OPP5*/
- {S430M, VDD1_OPP5, 0x3C},
+ {true, S430M, VDD1_OPP5, 0x3C},
};
const struct omap_opp_table omap3_mpu_opp_table = {
@@ -282,6 +282,9 @@ static int program_opp(int res, struct omap_opp *opp, int target_level,
t_opp = ID_VDD(res) | ID_OPP_NO(opp[target_level].opp_id);
c_opp = ID_VDD(res) | ID_OPP_NO(opp[current_level].opp_id);
#endif
+ /* only allow enabled OPPs */
+ if (!opp[target_level].enabled)
+ return -EINVAL;
/* Sanity check of the OPP params before attempting to set */
if (!opp[target_level].rate || !opp[target_level].vsel)
@@ -21,6 +21,7 @@
/**
* struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
+ * @enabled: enabled if true, disabled if false
* @rate: target clock rate
* @opp_id: OPP ID
* @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
@@ -28,6 +29,7 @@
* Operating performance point data. Can vary by OMAP chip and board.
*/
struct omap_opp {
+ bool enabled;
unsigned long rate;
u8 opp_id;
u16 vsel;