@@ -209,7 +209,9 @@ void __init omap3_check_revision(void)
hawkeye = (idcode >> 12) & 0xffff;
rev = (idcode >> 28) & 0xff;
- if (hawkeye == 0xb7ae) {
+ switch (hawkeye) {
+ case 0xb7ae:
+ /* Handle 34xx/35xx devices */
switch (rev) {
case 0: /* Take care of early samples */
case 1:
@@ -228,6 +230,21 @@ void __init omap3_check_revision(void)
/* Use the latest known revision as default */
omap_revision = OMAP3430_REV_ES3_1;
}
+ break;
+ case 0xb891:
+ /* Handle 36xx devices */
+ switch (rev) {
+ case 0:
+ omap_revision = OMAP3630_REV_ES1_0;
+ break;
+ default:
+ /* Use the latest known revision as default */
+ omap_revision = OMAP3630_REV_ES1_0;
+ }
+ break;
+ default:
+ /* Unknown default to latest silicon rev as default*/
+ omap_revision = OMAP3630_REV_ES1_0;
}
}
@@ -249,9 +266,10 @@ void __init omap3_cpuinfo(void)
* on available features. Upon detection, update the CPU id
* and CPU class bits.
*/
- if (omap3_has_iva() && omap3_has_sgx()) {
+ if (cpu_is_omap3630())
+ strcpy(cpu_name, "3630");
+ else if (omap3_has_iva() && omap3_has_sgx())
strcpy(cpu_name, "3430/3530");
- }
else if (omap3_has_sgx()) {
omap_revision = OMAP3525_REV(rev);
strcpy(cpu_name, "3525");
@@ -180,6 +180,7 @@ IS_OMAP_CLASS(34xx, 0x34)
IS_OMAP_SUBCLASS(242x, 0x242)
IS_OMAP_SUBCLASS(243x, 0x243)
IS_OMAP_SUBCLASS(343x, 0x343)
+IS_OMAP_SUBCLASS(363x, 0x363)
#define cpu_is_omap7xx() 0
#define cpu_is_omap15xx() 0
@@ -385,6 +386,7 @@ IS_OMAP_TYPE(3430, 0x3430)
(omap3_has_sgx()) & \
(!omap3_has_iva()))
# define cpu_is_omap3530 (cpu_is_omap3430())
+# define cpu_is_omap3630() is_omap363x()
#endif
# if defined(CONFIG_ARCH_OMAP4)
@@ -415,6 +417,8 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP3430_REV_ES3_0 0x34303034
#define OMAP3430_REV_ES3_1 0x34304034
+#define OMAP3630_REV_ES1_0 0x36300034
+
#define OMAP35XX_CLASS 0x35000034
#define OMAP3503_REV(v) (OMAP35XX_CLASS | (0x3503 << 16) | (v << 12))
#define OMAP3515_REV(v) (OMAP35XX_CLASS | (0x3515 << 16) | (v << 12))