@@ -1096,6 +1096,12 @@ static int __init omap2_clk_arch_init(void)
if (!mpurate)
return -EINVAL;
+ if ((mpurate == 720000000) && !omap3_has_720mhz()) {
+ printk(KERN_ERR "*** Silicon doesn't support 720MHz\n");
+
+ mpurate = 600000000; /* Set to highest supported */
+ }
+
/* REVISIT: not yet ready for 343x */
if (clk_set_rate(&dpll1_ck, mpurate))
printk(KERN_ERR "*** Unable to set MPU rate\n");
@@ -79,6 +79,7 @@ EXPORT_SYMBOL(omap_type);
#define OMAP_TAP_DIE_ID_2 0x0220
#define OMAP_TAP_DIE_ID_3 0x0224
+
#define read_tap_reg(reg) __raw_readl(tap_base + (reg))
struct omap_id {
@@ -180,6 +181,15 @@ void __init omap3_check_features(void)
* TODO: Get additional info (where applicable)
* e.g. Size of L2 cache.
*/
+
+ /*
+ * Does it support 720MHz?
+ */
+ status = (OMAP3_SKUID_MASK & read_tap_reg(OMAP3_PRODID));
+
+ if (status & OMAP3_SKUID_720MHZ) {
+ omap3_features |= OMAP3_HAS_720MHZ;
+ }
}
void __init omap3_check_revision(void)
@@ -296,6 +306,7 @@ void __init omap3_cpuinfo(void)
OMAP3_SHOW_FEATURE(sgx);
OMAP3_SHOW_FEATURE(neon);
OMAP3_SHOW_FEATURE(isp);
+ OMAP3_SHOW_FEATURE(720mhz);
}
/*
@@ -238,6 +238,13 @@
#define FEAT_NEON 0
#define FEAT_NEON_NONE 1
+/*
+ * Product ID register
+ */
+#define OMAP3_PRODID 0x020C
+
+#define OMAP3_SKUID_MASK 0x0f
+#define OMAP3_SKUID_720MHZ 0x08
#ifndef __ASSEMBLY__
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
@@ -472,6 +472,7 @@ extern u32 omap3_features;
#define OMAP3_HAS_SGX BIT(2)
#define OMAP3_HAS_NEON BIT(3)
#define OMAP3_HAS_ISP BIT(4)
+#define OMAP3_HAS_720MHZ BIT(5)
#define OMAP3_HAS_FEATURE(feat,flag) \
static inline unsigned int omap3_has_ ##feat(void) \
@@ -484,5 +485,6 @@ OMAP3_HAS_FEATURE(sgx, SGX)
OMAP3_HAS_FEATURE(iva, IVA)
OMAP3_HAS_FEATURE(neon, NEON)
OMAP3_HAS_FEATURE(isp, ISP)
+OMAP3_HAS_FEATURE(720mhz, 720MHZ)
#endif