From patchwork Thu Oct 29 08:30:19 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalle Jokiniemi X-Patchwork-Id: 56424 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n9T8UJ4j022208 for ; Thu, 29 Oct 2009 08:30:20 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753397AbZJ2IaN (ORCPT ); Thu, 29 Oct 2009 04:30:13 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753297AbZJ2IaM (ORCPT ); Thu, 29 Oct 2009 04:30:12 -0400 Received: from smtp1.digia.com ([82.118.214.156]:12145 "EHLO smtp1.digia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753209AbZJ2IaI (ORCPT ); Thu, 29 Oct 2009 04:30:08 -0400 Received: from smtp1.digia.com (unknown [127.0.0.1]) by IMSA (Postfix) with ESMTP id 4DD5647887E; Thu, 29 Oct 2009 10:30:12 +0200 (EET) Received: from IT-EXCH02-HKI.it.local (unknown [10.9.52.55]) by smtp1.digia.com (Postfix) with ESMTP id 36F094787B2; Thu, 29 Oct 2009 10:30:12 +0200 (EET) Received: from localhost.localdomain (10.120.146.33) by IT-EXCH02-HKI.it.local (10.9.52.56) with Microsoft SMTP Server id 8.1.340.0; Thu, 29 Oct 2009 10:30:11 +0200 From: Kalle Jokiniemi To: CC: , , , Kalle Jokiniemi Subject: [PATCH 2/3] OMAP3: Add valid field into C-state parameter passing Date: Thu, 29 Oct 2009 10:30:19 +0200 Message-ID: <1256805020-7402-3-git-send-email-kalle.jokiniemi@digia.com> X-Mailer: git-send-email 1.5.4.3 In-Reply-To: <1256805020-7402-2-git-send-email-kalle.jokiniemi@digia.com> References: <> <1256805020-7402-1-git-send-email-kalle.jokiniemi@digia.com> <1256805020-7402-2-git-send-email-kalle.jokiniemi@digia.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 11f0dc5..74c20ee 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -76,19 +76,19 @@ static struct prm_setup_vc omap3_setuptime_table = { /* FIXME: These values need to be updated based on more profiling on 3430sdp*/ static struct cpuidle_params omap3_cpuidle_params_table[] = { /* C1 */ - {2, 2, 5}, + {1, 2, 2, 5}, /* C2 */ - {10, 10, 30}, + {1, 10, 10, 30}, /* C3 */ - {50, 50, 300}, + {1, 50, 50, 300}, /* C4 */ - {1500, 1800, 4000}, + {1, 1500, 1800, 4000}, /* C5 */ - {2500, 7500, 12000}, + {1, 2500, 7500, 12000}, /* C6 */ - {3000, 8500, 15000}, + {1, 3000, 8500, 15000}, /* C7 */ - {10000, 30000, 300000}, + {1, 10000, 30000, 300000}, }; static int board_keymap[] = { diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index fdfa1d5..9c9474a 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -69,19 +69,19 @@ struct powerdomain *mpu_pd, *core_pd; */ static struct cpuidle_params cpuidle_params_table[] = { /* C1 */ - {2, 2, 5}, + {1, 2, 2, 5}, /* C2 */ - {10, 10, 30}, + {1, 10, 10, 30}, /* C3 */ - {50, 50, 300}, + {1, 50, 50, 300}, /* C4 */ - {1500, 1800, 4000}, + {1, 1500, 1800, 4000}, /* C5 */ - {2500, 7500, 12000}, + {1, 2500, 7500, 12000}, /* C6 */ - {3000, 8500, 15000}, + {1, 3000, 8500, 15000}, /* C7 */ - {10000, 30000, 300000}, + {1, 10000, 30000, 300000}, }; static int omap3_idle_bm_check(void) @@ -197,6 +197,8 @@ void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) return; for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { + cpuidle_params_table[i].valid = + cpuidle_board_params[i].valid; cpuidle_params_table[i].sleep_latency = cpuidle_board_params[i].sleep_latency; cpuidle_params_table[i].wake_latency = @@ -221,7 +223,8 @@ void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) void omap_init_power_states(void) { /* C1 . MPU WFI + Core active */ - omap3_power_states[OMAP3_STATE_C1].valid = 1; + omap3_power_states[OMAP3_STATE_C1].valid = + cpuidle_params_table[OMAP3_STATE_C1].valid; omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1; omap3_power_states[OMAP3_STATE_C1].sleep_latency = cpuidle_params_table[OMAP3_STATE_C1].sleep_latency; @@ -234,7 +237,8 @@ void omap_init_power_states(void) omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID; /* C2 . MPU WFI + Core inactive */ - omap3_power_states[OMAP3_STATE_C2].valid = 1; + omap3_power_states[OMAP3_STATE_C2].valid = + cpuidle_params_table[OMAP3_STATE_C2].valid; omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2; omap3_power_states[OMAP3_STATE_C2].sleep_latency = cpuidle_params_table[OMAP3_STATE_C2].sleep_latency; @@ -247,7 +251,8 @@ void omap_init_power_states(void) omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID; /* C3 . MPU CSWR + Core inactive */ - omap3_power_states[OMAP3_STATE_C3].valid = 1; + omap3_power_states[OMAP3_STATE_C3].valid = + cpuidle_params_table[OMAP3_STATE_C3].valid; omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3; omap3_power_states[OMAP3_STATE_C3].sleep_latency = cpuidle_params_table[OMAP3_STATE_C3].sleep_latency; @@ -261,7 +266,8 @@ void omap_init_power_states(void) CPUIDLE_FLAG_CHECK_BM; /* C4 . MPU OFF + Core inactive */ - omap3_power_states[OMAP3_STATE_C4].valid = 1; + omap3_power_states[OMAP3_STATE_C4].valid = + cpuidle_params_table[OMAP3_STATE_C4].valid; omap3_power_states[OMAP3_STATE_C4].type = OMAP3_STATE_C4; omap3_power_states[OMAP3_STATE_C4].sleep_latency = cpuidle_params_table[OMAP3_STATE_C4].sleep_latency; @@ -275,7 +281,8 @@ void omap_init_power_states(void) CPUIDLE_FLAG_CHECK_BM; /* C5 . MPU CSWR + Core CSWR*/ - omap3_power_states[OMAP3_STATE_C5].valid = 1; + omap3_power_states[OMAP3_STATE_C5].valid = + cpuidle_params_table[OMAP3_STATE_C5].valid; omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5; omap3_power_states[OMAP3_STATE_C5].sleep_latency = cpuidle_params_table[OMAP3_STATE_C5].sleep_latency; @@ -289,7 +296,8 @@ void omap_init_power_states(void) CPUIDLE_FLAG_CHECK_BM; /* C6 . MPU OFF + Core CSWR */ - omap3_power_states[OMAP3_STATE_C6].valid = 1; + omap3_power_states[OMAP3_STATE_C6].valid = + cpuidle_params_table[OMAP3_STATE_C6].valid; omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6; omap3_power_states[OMAP3_STATE_C6].sleep_latency = cpuidle_params_table[OMAP3_STATE_C6].sleep_latency; @@ -303,7 +311,8 @@ void omap_init_power_states(void) CPUIDLE_FLAG_CHECK_BM; /* C7 . MPU OFF + Core OFF */ - omap3_power_states[OMAP3_STATE_C7].valid = 1; + omap3_power_states[OMAP3_STATE_C7].valid = + cpuidle_params_table[OMAP3_STATE_C7].valid; omap3_power_states[OMAP3_STATE_C7].type = OMAP3_STATE_C7; omap3_power_states[OMAP3_STATE_C7].sleep_latency = cpuidle_params_table[OMAP3_STATE_C7].sleep_latency; diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index b9421e8..c195b14 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -43,6 +43,7 @@ struct prm_setup_vc { }; struct cpuidle_params { + u8 valid; u32 sleep_latency; u32 wake_latency; u32 threshold;