@@ -4,22 +4,31 @@
#include <plat/omap-pm.h>
/* MPU speeds */
+#define S1000M 1000000000
+#define S800M 800000000
#define S600M 600000000
#define S550M 550000000
#define S500M 500000000
+#define S300M 300000000
#define S250M 250000000
#define S125M 125000000
/* DSP speeds */
+#define S875M 875000000
+#define S660M 660000000
+#define S520M 520000000
#define S430M 430000000
#define S400M 400000000
#define S360M 360000000
+#define S260M 260000000
#define S180M 180000000
#define S90M 90000000
/* L3 speeds */
#define S83M 83000000
+#define S100M 100000000
#define S166M 166000000
+#define S200M 200000000
extern struct omap_opp *omap3_mpu_rate_table;
extern struct omap_opp *omap3_dsp_rate_table;
@@ -140,6 +140,41 @@ static __initdata struct omap_opp omap34xx_dsp_rate_table[] = {
{0, 0, 0, 0},
};
+static __initdata struct omap_opp omap36xx_mpu_rate_table[] = {
+ {0, 0, 0, 0},
+ /*OPP1 - 930mV - OPP50*/
+ {true, S300M, VDD1_OPP1, 0x1A},
+ /*OPP2 - 1.100V - OPP100*/
+ {true, S600M, VDD1_OPP2, 0x28},
+ /*OPP3 - 1.260V - OPP-Turbo*/
+ {true, S800M, VDD1_OPP3, 0x34},
+ /*OPP4 - 1.310V - OPP-SB*/
+ {false, S1000M, VDD1_OPP4, 0x38},
+ {0, 0, 0, 0},
+};
+
+static __initdata struct omap_opp omap36xx_l3_rate_table[] = {
+ {0, 0, 0, 0},
+ /*OPP1 - 930mV - OPP50 */
+ {true, S100M, VDD2_OPP1, 0x1A},
+ /*OPP2 - 1.375V - OPP100, OPP-Turbo, OPP-SB*/
+ {true, S200M, VDD2_OPP2, 0x3E},
+ {0, 0, 0, 0},
+};
+
+static __initdata struct omap_opp omap36xx_dsp_rate_table[] = {
+ {0, 0, 0, 0},
+ /*OPP1 - OPP50*/
+ {true, S260M, VDD1_OPP1, 0x1A},
+ /*OPP2 - OPP100*/
+ {true, S520M, VDD1_OPP2, 0x28},
+ /*OPP3 - OPP-Turbo*/
+ {false, S660M, VDD1_OPP3, 0x34},
+ /*OPP4 - OPP-SB*/
+ {false, S875M, VDD1_OPP4, 0x38},
+ {0, 0, 0, 0},
+};
+
struct omap_opp *omap3_mpu_rate_table;
struct omap_opp *omap3_dsp_rate_table;
struct omap_opp *omap3_l3_rate_table;
@@ -1283,22 +1318,42 @@ static void __init configure_vc(void)
void __init omap3_pm_init_opp_table(void)
{
/* Populate the base CPU rate tables here */
- omap3_mpu_rate_table = kmalloc(sizeof(omap34xx_mpu_rate_table),
- GFP_KERNEL);
- omap3_dsp_rate_table = kmalloc(sizeof(omap34xx_dsp_rate_table),
- GFP_KERNEL);
- omap3_l3_rate_table = kmalloc(sizeof(omap34xx_l3_rate_table),
- GFP_KERNEL);
-
- BUG_ON(!omap3_mpu_rate_table || !omap3_dsp_rate_table ||
- !omap3_l3_rate_table);
-
- memcpy(omap3_mpu_rate_table, omap34xx_mpu_rate_table,
- sizeof(omap34xx_mpu_rate_table));
- memcpy(omap3_dsp_rate_table, omap34xx_dsp_rate_table,
- sizeof(omap34xx_dsp_rate_table));
- memcpy(omap3_l3_rate_table, omap34xx_l3_rate_table,
- sizeof(omap34xx_l3_rate_table));
+ if (cpu_is_omap3630()) {
+ omap3_mpu_rate_table = kmalloc(sizeof(omap36xx_mpu_rate_table),
+ GFP_KERNEL);
+ omap3_dsp_rate_table = kmalloc(sizeof(omap36xx_dsp_rate_table),
+ GFP_KERNEL);
+ omap3_l3_rate_table = kmalloc(sizeof(omap36xx_l3_rate_table),
+ GFP_KERNEL);
+
+ BUG_ON(!omap3_mpu_rate_table || !omap3_dsp_rate_table ||
+ !omap3_l3_rate_table);
+
+ memcpy(omap3_mpu_rate_table, omap36xx_mpu_rate_table,
+ sizeof(omap36xx_mpu_rate_table));
+ memcpy(omap3_dsp_rate_table, omap36xx_dsp_rate_table,
+ sizeof(omap36xx_dsp_rate_table));
+ memcpy(omap3_l3_rate_table, omap36xx_l3_rate_table,
+ sizeof(omap36xx_l3_rate_table));
+ } else {
+ /* Default to 34xx devices */
+ omap3_mpu_rate_table = kmalloc(sizeof(omap34xx_mpu_rate_table),
+ GFP_KERNEL);
+ omap3_dsp_rate_table = kmalloc(sizeof(omap34xx_dsp_rate_table),
+ GFP_KERNEL);
+ omap3_l3_rate_table = kmalloc(sizeof(omap34xx_l3_rate_table),
+ GFP_KERNEL);
+
+ BUG_ON(!omap3_mpu_rate_table || !omap3_dsp_rate_table ||
+ !omap3_l3_rate_table);
+
+ memcpy(omap3_mpu_rate_table, omap34xx_mpu_rate_table,
+ sizeof(omap34xx_mpu_rate_table));
+ memcpy(omap3_dsp_rate_table, omap34xx_dsp_rate_table,
+ sizeof(omap34xx_dsp_rate_table));
+ memcpy(omap3_l3_rate_table, omap34xx_l3_rate_table,
+ sizeof(omap34xx_l3_rate_table));
+ }
}
static int __init omap3_pm_early_init(void)