@@ -222,6 +222,7 @@ static void __init omap_3430sdp_init_irq(void)
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
omap3_pm_init_vc(&omap3_setuptime_table);
omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
+ omap3_pm_init_opp_table();
omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL, omap3_mpu_rate_table,
omap3_dsp_rate_table, omap3_l3_rate_table);
omap_init_irq();
@@ -351,6 +351,7 @@ static void __init omap3_beagle_init_irq(void)
{
omap_board_config = omap3_beagle_config;
omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
+ omap3_pm_init_opp_table();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table,
omap3_dsp_rate_table, omap3_l3_rate_table);
@@ -336,6 +336,7 @@ static void __init omap3_evm_init_irq(void)
{
omap_board_config = omap3_evm_config;
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
+ omap3_pm_init_opp_table();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL, omap3_mpu_rate_table,
omap3_dsp_rate_table, omap3_l3_rate_table);
omap_init_irq();
@@ -31,6 +31,7 @@
#include <plat/gpmc.h>
#include <plat/usb.h>
+#include "pm.h"
#include "omap3-opp.h"
#define RX51_GPIO_SLEEP_IND 162
@@ -84,6 +85,7 @@ static void __init rx51_init_irq(void)
{
omap_board_config = rx51_config;
omap_board_config_size = ARRAY_SIZE(rx51_config);
+ omap3_pm_init_opp_table();
omap2_init_common_hw(rx51_get_sdram_timings(),
rx51_get_sdram_timings(), omap3_mpu_rate_table,
omap3_dsp_rate_table, omap3_l3_rate_table);
@@ -25,6 +25,7 @@
#include <plat/usb.h>
#include "mmc-twl4030.h"
+#include "pm.h"
#include "sdram-micron-mt46h32m32lf-6.h"
#include "omap3-opp.h"
@@ -215,6 +216,7 @@ static void __init omap_zoom2_init_irq(void)
{
omap_board_config = zoom2_config;
omap_board_config_size = ARRAY_SIZE(zoom2_config);
+ omap3_pm_init_opp_table();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params, omap3_mpu_rate_table,
omap3_dsp_rate_table, omap3_l3_rate_table);
@@ -21,8 +21,8 @@
#define S83M 83000000
#define S166M 166000000
-extern struct omap_opp omap3_mpu_rate_table[];
-extern struct omap_opp omap3_dsp_rate_table[];
-extern struct omap_opp omap3_l3_rate_table[];
+extern struct omap_opp *omap3_mpu_rate_table;
+extern struct omap_opp *omap3_dsp_rate_table;
+extern struct omap_opp *omap3_l3_rate_table;
#endif
@@ -51,6 +51,14 @@ struct cpuidle_params {
extern void omap3_pm_init_vc(struct prm_setup_vc *setup_vc);
extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
+/**
+ * omap3_pm_init_opp_table - OMAP opp table lookup called after
+ * cpu is detected.
+ * Initialize the basic opp table here, board files
+ * could choose to modify opp table after the basic initialization
+ */
+extern void omap3_pm_init_opp_table(void);
+
extern int resource_set_opp_level(int res, u32 target_level, int flags);
extern int resource_access_opp_lock(int res, int delta);
#define resource_lock_opp(res) resource_access_opp_lock(res, 1)
@@ -99,7 +99,7 @@ static struct prm_setup_vc prm_setup = {
.vdd1_off = 0x00, /* 0.6v */
};
-struct omap_opp omap3_mpu_rate_table[] = {
+static __initdata struct omap_opp omap34xx_mpu_rate_table[] = {
{0, 0, 0, 0},
/*OPP1*/
{true, S125M, VDD1_OPP1, 0x1E},
@@ -114,7 +114,7 @@ struct omap_opp omap3_mpu_rate_table[] = {
{0, 0, 0, 0},
};
-struct omap_opp omap3_l3_rate_table[] = {
+static __initdata struct omap_opp omap34xx_l3_rate_table[] = {
{0, 0, 0, 0},
/*OPP1*/
{false, 0, VDD2_OPP1, 0x1E},
@@ -125,7 +125,7 @@ struct omap_opp omap3_l3_rate_table[] = {
{0, 0, 0, 0},
};
-struct omap_opp omap3_dsp_rate_table[] = {
+static __initdata struct omap_opp omap34xx_dsp_rate_table[] = {
{0, 0, 0, 0},
/*OPP1*/
{true, S90M, VDD1_OPP1, 0x1E},
@@ -140,6 +140,10 @@ struct omap_opp omap3_dsp_rate_table[] = {
{0, 0, 0, 0},
};
+struct omap_opp *omap3_mpu_rate_table;
+struct omap_opp *omap3_dsp_rate_table;
+struct omap_opp *omap3_l3_rate_table;
+
static inline void omap3_per_save_context(void)
{
omap_gpio_save_context();
@@ -1276,6 +1280,27 @@ static void __init configure_vc(void)
pm_dbg_regset_init(2);
}
+void __init omap3_pm_init_opp_table(void)
+{
+ /* Populate the base CPU rate tables here */
+ omap3_mpu_rate_table = kmalloc(sizeof(omap34xx_mpu_rate_table),
+ GFP_KERNEL);
+ omap3_dsp_rate_table = kmalloc(sizeof(omap34xx_dsp_rate_table),
+ GFP_KERNEL);
+ omap3_l3_rate_table = kmalloc(sizeof(omap34xx_l3_rate_table),
+ GFP_KERNEL);
+
+ BUG_ON(!omap3_mpu_rate_table || !omap3_dsp_rate_table ||
+ !omap3_l3_rate_table);
+
+ memcpy(omap3_mpu_rate_table, omap34xx_mpu_rate_table,
+ sizeof(omap34xx_mpu_rate_table));
+ memcpy(omap3_dsp_rate_table, omap34xx_dsp_rate_table,
+ sizeof(omap34xx_dsp_rate_table));
+ memcpy(omap3_l3_rate_table, omap34xx_l3_rate_table,
+ sizeof(omap34xx_l3_rate_table));
+}
+
static int __init omap3_pm_early_init(void)
{
prm_clear_mod_reg_bits(OMAP3430_OFFMODE_POL, OMAP3430_GR_MOD,