From patchwork Thu Dec 31 13:29:22 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dasgupta, Romit" X-Patchwork-Id: 70379 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id nBVDTDwN000833 for ; Thu, 31 Dec 2009 13:29:31 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752224AbZLaN3b (ORCPT ); Thu, 31 Dec 2009 08:29:31 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752217AbZLaN3a (ORCPT ); Thu, 31 Dec 2009 08:29:30 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:47333 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752211AbZLaN3a (ORCPT ); Thu, 31 Dec 2009 08:29:30 -0500 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id nBVDTPHP005508 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 31 Dec 2009 07:29:27 -0600 Received: from [172.24.191.66] (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id nBVDTMUZ026361; Thu, 31 Dec 2009 18:59:22 +0530 (IST) Subject: [PATCH 6/10] OPP layer and additional cleanups From: Romit Dasgupta Reply-To: romit@ti.com To: paul@pwsan.com, nm@ti.com, khilman@deeprootsystems.com Cc: "linux-omap@vger.kernel.org" Organization: Texas Instruments Date: Thu, 31 Dec 2009 18:59:22 +0530 Message-ID: <1262266162.20175.182.camel@boson> Mime-Version: 1.0 X-Mailer: Evolution 2.28.1 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 65a6e04..d36cd1d 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -12,6 +12,9 @@ #define __ARCH_ARM_MACH_OMAP2_PM_H #include +#ifdef CONFIG_ARCH_OMAP3 +#include +#endif extern u32 enable_off_mode; extern u32 sleep_while_idle; @@ -23,6 +26,20 @@ extern void omap_sram_idle(void); extern int omap3_can_sleep(void); extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state); extern int omap3_idle_init(void); +#ifdef CONFIG_ARCH_OMAP3 +extern unsigned long get_l3_target_freq(struct omap_opp *); +enum volt_rail { + RAIL_NONE, + RAIL_VDD1, + RAIL_VDD2, +}; + +typedef int (*volt_scale_t) (enum volt_rail, struct omap_opp *, + struct omap_opp *); +extern volt_scale_t voltage_scale; +extern int pm_register_volt_scaling(volt_scale_t); +#endif + struct cpuidle_params { u8 valid;