From patchwork Thu Dec 31 13:29:39 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dasgupta, Romit" X-Patchwork-Id: 70383 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id nBVDTDwR000833 for ; Thu, 31 Dec 2009 13:29:48 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752319AbZLaN3r (ORCPT ); Thu, 31 Dec 2009 08:29:47 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752327AbZLaN3r (ORCPT ); Thu, 31 Dec 2009 08:29:47 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:47343 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752318AbZLaN3r (ORCPT ); Thu, 31 Dec 2009 08:29:47 -0500 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id nBVDTg47005530 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 31 Dec 2009 07:29:45 -0600 Received: from [172.24.191.66] (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id nBVDTeYR026388; Thu, 31 Dec 2009 18:59:40 +0530 (IST) Subject: [PATCH 10/10] OPP layer and additional cleanups From: Romit Dasgupta Reply-To: romit@ti.com To: paul@pwsan.com, nm@ti.com, khilman@deeprootsystems.com Cc: "linux-omap@vger.kernel.org" Organization: Texas Instruments Date: Thu, 31 Dec 2009 18:59:39 +0530 Message-ID: <1262266179.20175.186.camel@boson> Mime-Version: 1.0 X-Mailer: Evolution 2.28.1 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c index 78986f0..26fcae1 100644 --- a/arch/arm/plat-omap/cpu-omap.c +++ b/arch/arm/plat-omap/cpu-omap.c @@ -33,6 +33,8 @@ #if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) #include #include +#include +#include "../mach-omap2/pm.h" #endif #define VERY_HI_RATE 900000000 @@ -48,6 +50,7 @@ static struct cpufreq_frequency_table *freq_table; #endif static struct clk *mpu_clk; +static struct device l3_dev; /* TODO: Add support for SDRAM timing changes */ @@ -87,6 +90,10 @@ static int omap_target(struct cpufreq_policy *policy, #ifdef CONFIG_ARCH_OMAP1 struct cpufreq_freqs freqs; #endif +#ifdef CONFIG_ARCH_OMAP3 + struct omap_opp *opp; + unsigned long freq; +#endif int ret = 0; /* Ensure desired rate is within allowed range. Some govenors @@ -111,15 +118,66 @@ static int omap_target(struct cpufreq_policy *policy, ret = clk_set_rate(mpu_clk, freqs.new * 1000); cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); #elif defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) - if (mpu_opps) { - unsigned long freq = target_freq * 1000; - if (!IS_ERR(opp_find_freq_ceil(mpu_opps, &freq))) - omap_pm_cpu_set_freq(freq); + freq = target_freq * 1000; + opp = find_opp_by_freq(OPP_MPU, freq, OPP_EQ | OPP_ENABLED); + if (!opp) { + if (relation == CPUFREQ_RELATION_H) + opp = find_opp_by_freq(OPP_MPU, freq, + OPP_H | OPP_ENABLED); + else if (relation == CPUFREQ_RELATION_L) + opp = find_opp_by_freq(OPP_MPU, freq, + OPP_L | OPP_ENABLED); } + + if (opp) + omap_pm_cpu_set_freq(opp_to_freq(opp)); + else + ret = -EPERM; #endif return ret; } +static int l3_cpufreq_notifier(struct notifier_block *nb, + unsigned long val, void *data) +{ + struct cpufreq_freqs *freq = data; + struct omap_opp *mpu_target_opp; + unsigned long l3_target_freq; + + switch (val) { + case CPUFREQ_PRECHANGE: + mpu_target_opp = find_opp_by_freq(OPP_MPU, freq->new * 1000, + OPP_EQ | OPP_ENABLED); + l3_target_freq = get_l3_target_freq(mpu_target_opp); + if (resource_get_level("l3_freq") != l3_target_freq) + resource_request("l3_freq", &l3_dev, l3_target_freq); + break; + + case CPUFREQ_POSTCHANGE: + break; + + case CPUFREQ_RESUMECHANGE: + break; + + default: + break; + } + + return 0; +} + +static struct notifier_block l3_cpufreq_notifier_block = { + .notifier_call = l3_cpufreq_notifier +}; + +static void __init l3_cpufreq_init(void) +{ + if (cpufreq_register_notifier(&l3_cpufreq_notifier_block, + CPUFREQ_TRANSITION_NOTIFIER)) + pr_err("omap-cpufreq: L3 cpufreq registration failed\n"); + return; +} + static int __init omap_cpu_init(struct cpufreq_policy *policy) { int result = 0; @@ -131,12 +189,10 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy) if (policy->cpu != 0) return -EINVAL; - policy->cur = policy->min = policy->max = omap_getspeed(0); - if (!cpu_is_omap34xx()) clk_init_cpufreq_table(&freq_table); else - opp_init_cpufreq_table(mpu_opps, &freq_table); + opp_init_cpufreq_table(&freq_table); if (freq_table) { result = cpufreq_frequency_table_cpuinfo(policy, freq_table); @@ -151,10 +207,11 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy) policy->min = policy->cpuinfo.min_freq; policy->max = policy->cpuinfo.max_freq; - policy->cur = omap_getspeed(0); + policy->cur = omap_getspeed(smp_processor_id()); /* FIXME: what's the actual transition time? */ policy->cpuinfo.transition_latency = 300 * 1000; + l3_cpufreq_init(); return 0; }