@@ -155,11 +155,20 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
* bits in case the powerdomain enters retention
*/
if (mpu_state <= PWRDM_POWER_RET) {
+ if (!enable_oswr) {
+ mpu_logicl1_ret_state = PWRDM_POWER_RET;
+ mpu_l2cache_ret_state = PWRDM_POWER_RET;
+ }
pwrdm_set_logic_retst(mpu_pd, mpu_logicl1_ret_state);
pwrdm_set_mem_retst(mpu_pd, 0, mpu_l2cache_ret_state);
}
if (core_state <= PWRDM_POWER_RET) {
+ if (!enable_oswr) {
+ core_logic_state = PWRDM_POWER_RET;
+ core_mem1_ret_state = PWRDM_POWER_RET;
+ core_mem2_ret_state = PWRDM_POWER_RET;
+ }
pwrdm_set_logic_retst(core_pd, core_logic_state);
pwrdm_set_mem_retst(core_pd, 0, core_mem1_ret_state);
pwrdm_set_mem_retst(core_pd, 1, core_mem2_ret_state);
@@ -601,6 +601,8 @@ static int __init pm_dbg_init(void)
&enable_off_mode, &pm_dbg_option_fops);
(void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d,
&sleep_while_idle, &pm_dbg_option_fops);
+ (void) debugfs_create_file("enable_oswr", S_IRUGO | S_IWUGO, d,
+ &enable_oswr, &pm_dbg_option_fops);
(void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d,
&wakeup_timer_seconds, &pm_dbg_option_fops);
@@ -15,6 +15,7 @@
extern u32 enable_off_mode;
extern u32 sleep_while_idle;
+extern u32 enable_oswr;
extern u32 voltage_off_while_idle;
extern void *omap3_secure_ram_storage;
@@ -73,6 +73,7 @@ static inline bool is_suspending(void)
u32 enable_off_mode;
u32 sleep_while_idle;
+u32 enable_oswr;
u32 wakeup_timer_seconds;
u32 voltage_off_while_idle;