From patchwork Thu Jan 21 04:01:02 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Chitriki X-Patchwork-Id: 74164 X-Patchwork-Delegate: omar.ramirez@ti.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o0L41q5I027481 for ; Thu, 21 Jan 2010 04:01:52 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753153Ab0AUEBs (ORCPT ); Wed, 20 Jan 2010 23:01:48 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753093Ab0AUEBr (ORCPT ); Wed, 20 Jan 2010 23:01:47 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:35476 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752280Ab0AUEBr (ORCPT ); Wed, 20 Jan 2010 23:01:47 -0500 Received: from dlep33.itg.ti.com ([157.170.170.112]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id o0L41jm0020352 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 20 Jan 2010 22:01:45 -0600 Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id o0L41i5L025510; Wed, 20 Jan 2010 22:01:44 -0600 (CST) Received: from soldel-laptop (soldel-laptop.am.dhcp.ti.com [128.247.79.53]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id o0L41iZ14839; Wed, 20 Jan 2010 22:01:44 -0600 (CST) Received: by soldel-laptop (Postfix, from userid 1000) id 8B0C46064AE; Wed, 20 Jan 2010 23:01:02 -0500 (EST) From: Deepak Chitriki To: linux-omap Cc: Fernando Guzman Lugo , Ameya Palande , Felipe Contreras , Hiroshi Doyu , Nishanth Menon , Omar Ramirez , Deepak Chitriki Subject: [PATCH] DSPBRIDGE: Fix BUG scheduling while atomic Date: Wed, 20 Jan 2010 22:01:02 -0600 Message-Id: <1264046462-2417-1-git-send-email-deepak.chitriki@ti.com> X-Mailer: git-send-email 1.6.0.4 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/drivers/dsp/bridge/wmd/_tiomap_pwr.h b/drivers/dsp/bridge/wmd/_tiomap_pwr.h index da2e7d9..54d7ca4 100644 --- a/drivers/dsp/bridge/wmd/_tiomap_pwr.h +++ b/drivers/dsp/bridge/wmd/_tiomap_pwr.h @@ -89,5 +89,12 @@ DSP_STATUS DSP_PeripheralClocks_Enable(struct WMD_DEV_CONTEXT *pDevContext, */ void DSPClkWakeupEventCtrl(u32 ClkId, bool enable); +/** + * tiomap3430_bump_dsp_opp_level() - bump up opp if required + * + * if the system is at a minimum opp, request for higher opp + */ +DSP_STATUS tiomap3430_bump_dsp_opp_level(void); + #endif /* _TIOMAP_PWR_ */ diff --git a/drivers/dsp/bridge/wmd/io_sm.c b/drivers/dsp/bridge/wmd/io_sm.c index 79a714a..3481beb 100644 --- a/drivers/dsp/bridge/wmd/io_sm.c +++ b/drivers/dsp/bridge/wmd/io_sm.c @@ -1132,7 +1132,7 @@ void IO_Schedule(struct IO_MGR *pIOMgr) spin_lock_irqsave(&pIOMgr->dpc_lock, flags); pIOMgr->dpc_req++; spin_unlock_irqrestore(&pIOMgr->dpc_lock, flags); - + tiomap3430_bump_dsp_opp_level(); /* Schedule DPC */ tasklet_schedule(&pIOMgr->dpc_tasklet); } diff --git a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c index 94b399f..54cba9f 100644 --- a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c +++ b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c @@ -806,3 +806,34 @@ void DSPClkWakeupEventCtrl(u32 ClkId, bool enable) break; } } + +/** + * tiomap3430_bump_dsp_opp_level() - bump up the opp if at minimum + * + * if we need a higher opp index, request for the same + */ +DSP_STATUS tiomap3430_bump_dsp_opp_level(void) +{ +#ifndef CONFIG_BRIDGE_DVFS + u32 opplevel; + + struct dspbridge_platform_data *pdata = + omap_dspbridge_dev->dev.platform_data; + + if (pdata->dsp_get_opp) { + opplevel = (*pdata->dsp_get_opp)(); + + /* + * If OPP is at minimum level, increase it before waking + * up the DSP. + */ + if (opplevel == 1 && pdata->dsp_set_min_opp) { + (*pdata->dsp_set_min_opp)(opp_level + 1); + DBG_Trace(DBG_LEVEL7, "CHNLSM_InterruptDSP: Setting " + "the vdd1 constraint level to %d before " + "waking DSP \n", opp_level + 1); + } + } +#endif + return DSP_SOK; +} diff --git a/drivers/dsp/bridge/wmd/tiomap_sm.c b/drivers/dsp/bridge/wmd/tiomap_sm.c index b04ed6d..1d2e5d7 100644 --- a/drivers/dsp/bridge/wmd/tiomap_sm.c +++ b/drivers/dsp/bridge/wmd/tiomap_sm.c @@ -96,11 +96,6 @@ DSP_STATUS CHNLSM_DisableInterrupt(struct WMD_DEV_CONTEXT *pDevContext) DSP_STATUS CHNLSM_InterruptDSP2(struct WMD_DEV_CONTEXT *pDevContext, u16 wMbVal) { -#ifdef CONFIG_BRIDGE_DVFS - struct dspbridge_platform_data *pdata = - omap_dspbridge_dev->dev.platform_data; - u32 opplevel = 0; -#endif struct CFG_HOSTRES resources; DSP_STATUS status = DSP_SOK; unsigned long timeout; @@ -114,12 +109,8 @@ DSP_STATUS CHNLSM_InterruptDSP2(struct WMD_DEV_CONTEXT *pDevContext, if (pDevContext->dwBrdState == BRD_DSP_HIBERNATION || pDevContext->dwBrdState == BRD_HIBERNATION) { #ifdef CONFIG_BRIDGE_DVFS - if (pdata->dsp_get_opp) - opplevel = (*pdata->dsp_get_opp)(); - if (opplevel == VDD1_OPP1) { - if (pdata->dsp_set_min_opp) - (*pdata->dsp_set_min_opp)(VDD1_OPP2); - } + if (!in_interrupt()) + tiomap3430_bump_dsp_opp_level(); #endif /* Restart the peripheral clocks */ DSP_PeripheralClocks_Enable(pDevContext, NULL);