From patchwork Wed Feb 17 00:57:20 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sonasath, Moiz" X-Patchwork-Id: 79816 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o1H0lBa6032409 for ; Wed, 17 Feb 2010 00:47:11 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933808Ab0BQArI (ORCPT ); Tue, 16 Feb 2010 19:47:08 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:38062 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933804Ab0BQArG (ORCPT ); Tue, 16 Feb 2010 19:47:06 -0500 Received: from dlep33.itg.ti.com ([157.170.170.112]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id o1H0l0Jl014793 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 16 Feb 2010 18:47:00 -0600 Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id o1H0kv4x009728; Tue, 16 Feb 2010 18:46:57 -0600 (CST) Received: from lina0132712 (lina0132712.am.dhcp.ti.com [128.247.79.146]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id o1H0kvZ00572; Tue, 16 Feb 2010 18:46:57 -0600 (CST) Received: by lina0132712 (Postfix, from userid 1000) id F3CE69D72E; Tue, 16 Feb 2010 18:57:21 -0600 (CST) From: Moiz Sonasath To: linux-omap@vger.kernel.org Cc: sameo@linux.intel.com, tony@atomide.com, Moiz Sonasath , Allen Pais , Vikram Pandita Subject: Date: Tue, 16 Feb 2010 18:57:20 -0600 Message-Id: <1266368241-10459-1-git-send-email-m-sonasath@ti.com> X-Mailer: git-send-email 1.5.6.3 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 17 Feb 2010 00:47:11 +0000 (UTC) diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index 789ca8c..2e6eb28 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -22,6 +22,7 @@ #include #include #include +#include #include "mux.h" @@ -52,5 +53,28 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate, omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); } + /* Disable OMAP 3630 internal pull-ups for all I2Ci */ + if (cpu_is_omap3630() && !(omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1) & OMAP3630_PRG_I2C1_PULLUPRESX)) { + + u32 prog_io; + + prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); + /* Program (bit 19)=1 to disable internal pull-up on I2C1 */ + prog_io |= OMAP3630_PRG_I2C1_PULLUPRESX; + /* Program (bit 0)=1 to disable internal pull-up on I2C2 */ + prog_io |= OMAP3630_PRG_I2C2_PULLUPRESX; + omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); + + prog_io = omap_ctrl_readl(OMAP36XX_CONTROL_PROG_IO2); + /* Program (bit 7)=1 to disable internal pull-up on I2C3 */ + prog_io |= OMAP3630_PRG_I2C3_PULLUPRESX; + omap_ctrl_writel(prog_io, OMAP36XX_CONTROL_PROG_IO2); + + prog_io = omap_ctrl_readl(OMAP36XX_CONTROL_PROG_IO_WKUP1); + /* Program (bit 5)=1 to disable internall pull-up on I2C4(SR) */ + prog_io |= OMAP3630_PRG_SR_PULLUPRESX; + omap_ctrl_writel(prog_io, OMAP36XX_CONTROL_PROG_IO_WKUP1); + } + return omap_plat_register_i2c_bus(bus_id, clkrate, info, len); } diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 2074473..9e58d8e 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -169,6 +169,9 @@ #define AM35XX_CONTROL_IP_SW_RESET (OMAP2_CONTROL_GENERAL + 0x0328) #define AM35XX_CONTROL_IPSS_CLK_CTRL (OMAP2_CONTROL_GENERAL + 0x032C) +/* 36xx-only CONTROL_GENERAL register offsets */ +#define OMAP36XX_CONTROL_PROG_IO2 (OMAP2_CONTROL_GENERAL + 0x0198) + /* 34xx PADCONF register offsets */ #define OMAP343X_PADCONF_ETK(i) (OMAP2_CONTROL_PADCONFS + 0x5a8 + \ (i)*2) @@ -200,6 +203,9 @@ #define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014) #define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018) +/* 36xx-only GENERAL_WKUP register offsets */ +#define OMAP36XX_CONTROL_PROG_IO_WKUP1 (OMAP343X_CONTROL_GENERAL_WKUP + 0x020) + /* 34xx D2D idle-related pins, handled by PM core */ #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 #define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 @@ -250,6 +256,8 @@ #define OMAP2_PBIASLITEVMODE0 (1 << 0) /* CONTROL_PROG_IO1 bits */ +#define OMAP3630_PRG_I2C2_PULLUPRESX (1 << 0) +#define OMAP3630_PRG_I2C1_PULLUPRESX (1 << 19) #define OMAP3630_PRG_SDMMC1_SPEEDCTRL (1 << 20) /* CONTROL_IVA2_BOOTMOD bits */ @@ -257,6 +265,12 @@ #define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0) #define OMAP3_IVA2_BOOTMOD_IDLE (0x1 << 0) +/* CONTROL_PROG_IO2 bits on omap3630 */ +#define OMAP3630_PRG_I2C3_PULLUPRESX (1 << 7) + +/* CONTROL_PROG_IO_WKUP1 bits on omap3630 */ +#define OMAP3630_PRG_SR_PULLUPRESX (1 << 5) + /* CONTROL_PADCONF_X bits */ #define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) #define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14)